DC-62 GHz 4-phase 25% duty cycle quadrature clock generator

Naftali Weiss, S. Shopov, P. Schvan, P. Chevalier, A. Cathelin, S. Voinigescu
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引用次数: 9

Abstract

A process-, temperature-and supply-insensitive DC-to-62GHz 4-phase quadrature generator for clock signals with 25% duty cycle was manufactured in a production 55-nm SiGe BiCMOS technology. The purely digital circuit is based on a 2.5 V bipolar-CML static divider, AND gates and inverter stages, and operates with input signals from DC to 124 GHz while consuming 178 mW. Measurements were conducted with 63-GHz and 100-GHz bandwidth real-time oscilloscopes. The measured self-oscillation frequency of the static divider in the generator was 98.8 GHz, compared to 93 GHz in simulation. The measured output signals remained in quadrature up to 62 GHz. The measured duty cycle is 25–26% up to 30 GHz and increases up to 33% at 50 GHz, beyond which measurements are impacted by the limited bandwidth of the oscilloscope. The simulated duty cycle was lower than 28% up to 62 GHz.
DC-62 GHz 4相25%占空比正交时钟发生器
采用55纳米SiGe BiCMOS技术生产了一款对工艺、温度和电源不敏感的dc - 62ghz 4相正交发生器,用于25%占空比的时钟信号。纯数字电路基于2.5 V双极- cml静态分频器、与门和逆变级,输入信号从DC到124 GHz,功耗为178 mW。测量用63 ghz和100 ghz带宽的实时示波器进行。静态分频器的自振荡频率为98.8 GHz,仿真结果为93 GHz。测量到的输出信号保持正交到62 GHz。测量的占空比在30 GHz时为25-26%,在50 GHz时增加到33%,超过这一范围的测量会受到示波器有限带宽的影响。模拟的占空比在62 GHz范围内低于28%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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