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2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)最新文献

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Simulation of impact of vertical grounding electrode on impulse grounding resistance of substation grounding network 垂直接地电极对变电站接地网冲击接地电阻影响的仿真
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242130
Lijun Zhou, Jian He, Han Xu, Pengcheng Wang, Ying Chen, Sixiang Chen
{"title":"Simulation of impact of vertical grounding electrode on impulse grounding resistance of substation grounding network","authors":"Lijun Zhou, Jian He, Han Xu, Pengcheng Wang, Ying Chen, Sixiang Chen","doi":"10.1109/ICAM.2017.8242130","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242130","url":null,"abstract":"In order to study the influence of vertical grounding electrode on impulse grounding resistance of substation ground network, the grounding model was built in COMSOL, and the impulse grounding resistances of substation grounding grid in different distribution, length and quantity of vertical grounding electrode were simulated and calculated. The results show that the closer the vertical ground to the lightning current injection point is, the smaller the impact grounding resistance is. The impulse grounding resistance, that has a minimum value, decreases first and then increases with the increase of the vertical grounding electrode length. When the additional vertical grounding electrodes are placed in accordance with the evacuation outside and internal density manner within a certain region ranging from the lightning current injection point, the impact grounding resistance has the best reduction effect.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128227710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Multiple-PE particle filter processor IC for mobile positioning systems 用于移动定位系统的多pe粒子滤波处理器IC
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242179
Y. Lo, Mu-Hsuan Chuang, Min-Hsin Cheng, Yuan-Hao Huang
{"title":"Multiple-PE particle filter processor IC for mobile positioning systems","authors":"Y. Lo, Mu-Hsuan Chuang, Min-Hsin Cheng, Yuan-Hao Huang","doi":"10.1109/ICAM.2017.8242179","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242179","url":null,"abstract":"This paper presents a particle filter processor IC for fingerprinting-based positioning in mobile communication systems. The proposed particle filter improves the positioning accuracy from algorithmic and architectural perspectives. For the algorithmic perspective, the proposed particle filter solves the bottleneck of large information exchange of particles by proposing a threshold IMH resampling method to raise the hardware utilization rate and reduce processing latency. For the architectural perspective, the proposed multiple-processing-element (multiple-PE) architecture based on central unit (CU) for threshold IMH resampling can further reduce the processing latency because no particle routing is needed in the PE-CU architecture. The proposed particle filter processor IC was designed and implemented by TSMC 0.18 μ m technology. The processor chip achieves 118MHz clock frequency with 1.48mm2 core area and 3.64mm2 chip area. The IC measurement results show that the proposed multiple-PE particle filter chip has two times hardware efficiency of one-PE particle filter.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127178096","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An innovation tool-chain for synthesis and implementation of Xilinx FPGA devices 用于合成和实现赛灵思FPGA器件的创新工具链
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242152
Yi Zuo, Anping He, Caihong Li, Lvying Yu
{"title":"An innovation tool-chain for synthesis and implementation of Xilinx FPGA devices","authors":"Yi Zuo, Anping He, Caihong Li, Lvying Yu","doi":"10.1109/ICAM.2017.8242152","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242152","url":null,"abstract":"Synthesis and implementation are two fundamental steps of the hardware design. Mountains of work in this area synthesize and implement your design from Hardware Description Language (HDL) description to the target FPGA device. We present ISE plus Customized P&R, a tool-chain converting Verilog designs into XDL that contains Xilinx FPGA implement modules. A key aspect of this tool-chain is that it both embraces the efficient optimal capacity of synthesizing commercial FPGA Design Suite and the flexible bottom control ability for the implementation of the open-source third-part software. Moreover, this tool-chain can automatically generate customized placement and routing, which provided a feasibility to synthesize and implement asynchronous FPGA designs in bulk without the manual labor.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"98 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114171221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An efficient scheme for analyzing unloading process 一种有效的卸料过程分析方案
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242177
Meirong Wei, Yan Liu
{"title":"An efficient scheme for analyzing unloading process","authors":"Meirong Wei, Yan Liu","doi":"10.1109/ICAM.2017.8242177","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242177","url":null,"abstract":"As the air bearing flying height (a few nanometer levels) and the deformation of suspensions (micro-or millimeter level) run at two different scales, a dual-scale model for head disk interface (HDIs) has been proposed to analyze the unloading behavior of a subambient pressure slider. With the scheme developed, the unloading process can be simulated efficiently. The nonlinear vibrations of the air bearing forces and moments were described with analytical expression obtained from a surface fitting scheme. Combined with a 3 degree of freedom (DOF) suspension model whose parameters were estimated from a comprehensive FEM and experiments are applied to verify the value. The results from the FEM and the experiments are comparable and acceptable for simulations.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128704598","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An 80 Gb/s SiGe BiCMOS fully differential variable gain stage in a digitally-controlled adaptive equalizer for high speed serial electrical communication 一个80gb /s SiGe BiCMOS全差分变增益级的数字控制自适应均衡器，用于高速串行电通信
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242192
Y. Ban
{"title":"An 80 Gb/s SiGe BiCMOS fully differential variable gain stage in a digitally-controlled adaptive equalizer for high speed serial electrical communication","authors":"Y. Ban","doi":"10.1109/ICAM.2017.8242192","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242192","url":null,"abstract":"This paper presents the design, trade-off of a very high bandwidth variable gain stage, and the practical limits during its implementation as a tunable gain cell in the high speed equalizer for next generation serial electrical / optical communication links. The variable gain stage presented in this work, achieves a bandwidth of above 50 GHz and a tunable gain range of 40 dB. With a very high input and output impedance, it could be used in the equalizer with the input data streams up to 80 Gb/s. The variable gain stage is designed in an 130 nm SiGe BiCMOS technology, with an active area of 0.04 mm2 and a power consumption of 30 mW from a 2.5 V supply.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"12 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117259906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimization of fabrication processes of the mesa-type GaAs:Te blocked-impurity-band detector 平台型GaAs:Te阻塞杂质带探测器制作工艺的优化
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242161
B. Wang, Xiaodong Wang, Yulu Chen, Liwei Hou, Wei Xie, M. Pan
{"title":"Optimization of fabrication processes of the mesa-type GaAs:Te blocked-impurity-band detector","authors":"B. Wang, Xiaodong Wang, Yulu Chen, Liwei Hou, Wei Xie, M. Pan","doi":"10.1109/ICAM.2017.8242161","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242161","url":null,"abstract":"In this work, the device structure of the mesa-type GaAs:Te blocked-impurity-band detector was designed. The fabrication processes were presented briefly, and optimization of the fabrication processes was investigated. A 3-micron-thick SiO2 film was deposited as resist to substitute for photoresist in the 50-micron-deep mesa etching process. In addition, a bi-layer photoresist lithography technique was adopted to optimize the process of electrode fabrication. It is demonstrated that the device quality can be improved significantly after optimization.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"111 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123520220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Application of through silicon vias on millimeter-wave silicon based antenna 硅通孔在毫米波硅基天线中的应用
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242194
Zhou Dali, Yang Jiapeng, Zhou Jun, Shen Ya
{"title":"Application of through silicon vias on millimeter-wave silicon based antenna","authors":"Zhou Dali, Yang Jiapeng, Zhou Jun, Shen Ya","doi":"10.1109/ICAM.2017.8242194","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242194","url":null,"abstract":"Through silicon vias (TSVs) are arranged to form a rectangular resonant cavity to improve performance of silicon based antenna in this paper. On the basis of fundamental theory of rectangular resonant cavity, the model of cavity made of through silicon vias is analyzed. Considering the size of millimeter-wave antenna, the three dimensions of cavity for mode TE101 is calculated. Applying the resonant cavity on coplanar waveguide (CPW) coupled slot antenna, a new frequency is generated which can lead to dual bands or a wider bandwidth. And the radiation gain can be improved by 1.9dB. So the application of through silicon via on improving performances of silicon based antenna is effective enough.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121667965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Optimized design of the micromechanical gyroscope's elastic beam 微机械陀螺仪弹性梁优化设计
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242160
Chenqing Zhang, Shuying Hao, Huijie Li, Qichang Zhang
{"title":"Optimized design of the micromechanical gyroscope's elastic beam","authors":"Chenqing Zhang, Shuying Hao, Huijie Li, Qichang Zhang","doi":"10.1109/ICAM.2017.8242160","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242160","url":null,"abstract":"There will always have a greater residual stress in the processing process of the micromechanical gyroscopes straight elastic-beam. affecting the performance of micromechanical gyroscopes. According to the principle of stiffness equivalence, the original elastic-beam of the micromechanical gyroscope is improved to the beam of drive as the U-beam and sense as the carb-leg beam by the combination of theoretical analysis and finite element calculation. Compared with the ANSYS calculation results, The stiffness error and sensitivity of the driving beam are relatively small, the natural frequency error of the micromachined gyroscope is also within reasonable range; the interference mode differs from the working mode and The frequency of the drive and the sense match very well. The improved Micro-Electro-Mechanical System gyroscope satisfies the requirements of frequency matching and interference modal isolation. The improved design method provides theoretical guidance for the improvement and optimization of MEMS gyroscope.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131265100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A new modulating electric field structure with homo-type fixed interface charges 一种具有同型固定界面电荷的新型调制电场结构
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242168
Li Qi, Luo Le, Li Haiou, L. Shiwei, Zhang Fabi, Yang Nianjiong
{"title":"A new modulating electric field structure with homo-type fixed interface charges","authors":"Li Qi, Luo Le, Li Haiou, L. Shiwei, Zhang Fabi, Yang Nianjiong","doi":"10.1109/ICAM.2017.8242168","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242168","url":null,"abstract":"In this paper, a new LDMOS on silicon-on-insulator (SOI) with homo-type fixed interface charges in the bottom of field oxide layer is proposed. The surface electric field can be improved by adding the fixed interface charges and optimizing the doping profile, which can effectively modulate electric field to obtain the optimization trade-off between the breakdown voltage and on-resistance. The numerical results indicate that the breakdown voltage of device proposed is increased by 40% and the on-resistance reduced by 44% in comparison to that of the conventional LDMOS.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134646902","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Responsivity properties of GaAs based Blocked-Impurity-Band detectors 基于砷化镓的阻塞杂质带探测器的响应特性
2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI: 10.1109/ICAM.2017.8242162
Yulu Chen, B. Wang, Chuansheng Zhang, Liwei Hou, M. Pan, Xiaodong Wang
{"title":"Responsivity properties of GaAs based Blocked-Impurity-Band detectors","authors":"Yulu Chen, B. Wang, Chuansheng Zhang, Liwei Hou, M. Pan, Xiaodong Wang","doi":"10.1109/ICAM.2017.8242162","DOIUrl":"https://doi.org/10.1109/ICAM.2017.8242162","url":null,"abstract":"GaAs-based Blocked-Impurity-Band (BIB) detector, as a potential high-sensitive, low noise Terahertz (THz) detector, has been developed for the broad application in the area of THz security check and astronomy mission. In this work, GaAs:Si and GaAs:Te BIB detectors were fabricated. Their responsivity properties were measured at T=3.5K, under different biases and the same black body temperature of 1000K. The experimental results reveal that the GaAs:Si BIB device has a higher responsivity of 66 mA/W (Vbias=1V), about 5 times higher than that of GaAs:Te BIB device. This work demonstrates Si as a suitable choice of doping element for the absorption layer of GaAs based BIB detectors.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129455318","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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