平台型GaAs:Te阻塞杂质带探测器制作工艺的优化

2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI:10.1109/ICAM.2017.8242161

B. Wang, Xiaodong Wang, Yulu Chen, Liwei Hou, Wei Xie, M. Pan

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引用次数: 0

摘要

本文设计了台面型GaAs:Te阻塞杂质带探测器的器件结构。简要介绍了制备工艺，并对制备工艺的优化进行了研究。在50微米深的台面蚀刻工艺中，沉积了一层3微米厚的SiO2薄膜作为光刻胶代替光刻胶。此外，采用双层光刻技术对电极的制作工艺进行了优化。结果表明，优化后的器件质量得到显著提高。

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Optimization of fabrication processes of the mesa-type GaAs:Te blocked-impurity-band detector

In this work, the device structure of the mesa-type GaAs:Te blocked-impurity-band detector was designed. The fabrication processes were presented briefly, and optimization of the fabrication processes was investigated. A 3-micron-thick SiO2 film was deposited as resist to substitute for photoresist in the 50-micron-deep mesa etching process. In addition, a bi-layer photoresist lithography technique was adopted to optimize the process of electrode fabrication. It is demonstrated that the device quality can be improved significantly after optimization.

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来源期刊

2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)

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