IEEE transactions on biomedical circuits and systems最新文献_第3页

A 1024-Channel Hybrid Voltage/Current-Clamp Neural Interface System-on-Chip with Dynamic Incremental SAR Acquisition. 具有动态增量SAR采集的1024通道混合电压/电流箝位神经接口片上系统。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2026-01-21 DOI: 10.1109/TBCAS.2026.3656160

Jun Wang, Omowuyi Olajide, Akshay Paul, Dinghong Zhang, Jiajia Wu, Yuchen Xu, Yimin Zou, Chul Kim, Gert Cauwenberghs

{"title":"A 1024-Channel Hybrid Voltage/Current-Clamp Neural Interface System-on-Chip with Dynamic Incremental SAR Acquisition.","authors":"Jun Wang, Omowuyi Olajide, Akshay Paul, Dinghong Zhang, Jiajia Wu, Yuchen Xu, Yimin Zou, Chul Kim, Gert Cauwenberghs","doi":"10.1109/TBCAS.2026.3656160","DOIUrl":"https://doi.org/10.1109/TBCAS.2026.3656160","url":null,"abstract":"The demand for high-throughput, multi-modal recording and stimulation in neuroscience research has driven the development of neural interfaces that optimize area and energy efficiency without compromising noise performance. Simultaneously, the need for on-chip data compression to reduce data volume has become increasingly critical. This work presents a neural interface system-on-chip (NISoC) that incorporates 1,024 channels for simultaneous electrical recording and stimulation, enabling high-resolution, high-throughput electrophysiology with record noise-energy efficiency. The 2 mm × 2 mm NISoC, fabricated using 65 nm CMOS technology, integrates a 32 × 32 array of electrodes vertically coupled to analog front-ends. These front-ends support both voltage and current clamping through a programmable interface, providing a voltage range up to 100 dB and a current range of 120 dB. Each channel operates at a power consumption of 0.81 µW, achieving an input-referred voltage noise of 8.8 µVrms over a signal bandwidth from DC to 12.5 kHz. The NISoC also integrates on-chip data acquisition through a back-end array of 32 dynamic incremental SAR ADCs, achieving 25 Msps and 11 effective number of bits (ENOB) acquisition with an energy efficiency of 2 fJ/level. The dynamic incremental SAR ADC architecture further offers additional functionality of intrinsic spike detection for future on-chip neural data compression.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2026-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146021170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Neuromodulation System with Real-Time Neural Signals Recovery Overlapped Temporally and Spectrally with Stimulation Artifacts. 具有实时神经信号恢复与刺激伪影在时间和频谱上重叠的神经调节系统。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2026-01-20 DOI: 10.1109/TBCAS.2026.3654961

Geunchang Seong, Jaeouk Cho, Heeyoung Jung, Minjae Kim, Dongyeol Seok, Su Yeon Jeon, Seonae Jang, Changhoon Sung, Ul Gyu Han, Seongjun Park, Young Sang Cho, Chul Kim

{"title":"A Neuromodulation System with Real-Time Neural Signals Recovery Overlapped Temporally and Spectrally with Stimulation Artifacts.","authors":"Geunchang Seong, Jaeouk Cho, Heeyoung Jung, Minjae Kim, Dongyeol Seok, Su Yeon Jeon, Seonae Jang, Changhoon Sung, Ul Gyu Han, Seongjun Park, Young Sang Cho, Chul Kim","doi":"10.1109/TBCAS.2026.3654961","DOIUrl":"https://doi.org/10.1109/TBCAS.2026.3654961","url":null,"abstract":"Continuous neural signal acquisition during electrical stimulation is essential for neuromodulation; nevertheless, it is often hindered by high-amplitude stimulation artifacts (SAs). This study presents a neuromodulation system with an application-specific integrated circuit (ASIC) that implements 2.9× faster adaptation than a fixed parameter method for the real-time recovery of neural signals fully overlapped with stimulation artifacts in both time and frequency domains, without any prior calibration. The onchip SA removal module leverages an adaptive infinite impulse response (IIR)-based template-subtraction method with zero-multiplier operation and low computational complexity, enabling rapid template convergence and high accuracy under time-varying SAs while optimizing area and power efficiency. The stimulator incorporates a stimulation frequency dithering mechanism to minimize neural signal loss at the stimulation frequency and its harmonics during recovery. In vitro and in vivo experimental validation, including local field potential (LFP) and action potential (AP) recordings, demonstrated real-time SA removal, achieving 40 dB reduction of SA component and preserving neural signal integrity. The ASIC, fabricated using the TSMC 65nm CMOS LP process, occupies a total die area of 1 mm2. The SA removal module including on-chip memory occupies 0.15 mm2 and consumes 1.3μW. The presented system enables recovery of neural signals obscured by time-varying SAs in real time, without requiring prior calibration or external processing units.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2026-01-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146014101","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

DERMIS: End-to-End Design of a Fully Integrated Large-Area Grasp-State-Adaptive Tactile Sensor System on a-IGZO TFT. 基于a- igzo TFT的全集成大面积抓握状态自适应触觉传感器系统的端到端设计。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2026-01-14 DOI: 10.1109/TBCAS.2026.3654620

Mark Daniel Alea, Maria Atalaia Rosa, Michael Kraft, Kris Myny, Georges Gielen

{"title":"DERMIS: End-to-End Design of a Fully Integrated Large-Area Grasp-State-Adaptive Tactile Sensor System on a-IGZO TFT.","authors":"Mark Daniel Alea, Maria Atalaia Rosa, Michael Kraft, Kris Myny, Georges Gielen","doi":"10.1109/TBCAS.2026.3654620","DOIUrl":"https://doi.org/10.1109/TBCAS.2026.3654620","url":null,"abstract":"This paper presents the design of a high-resolution fully-integrated tactile sensor system, called DERMIS, implemented in a flexible thin-film transistor (TFT) technology for large-area electronic skins. It discusses how an end-to-end design strategy - from the sensor to the readout and to the on-chip feature extraction - enables efficient system reconfiguration to implement a first-of-its-kind and biologically-inspired grasp-state-adaptive tactile sensor. In contrast to existing tactile sensors that only detect slip, the DERMIS system also measures key contact cues, including friction, contact onset/offset, and lift-off onset/offset, enabled by a novel differential capacitive sensorstructure that independently senses shear and normal forces and a co-designed front end that directly extracts both components at the analog domain. Furthermore, due to the analog-based encoding of these grasp-state-dependent contact parameters, the system avoids the use of complex offline slip-extraction algorithms. The per-taxel (tactile pixel) readout consumes a state-of-the-art 72 µW power consumption and occupies 0.36 mm2 area while achieving a human-like 2 mNRMS force resolution at 0.6 mm pitch. This work demonstrates our solution for the first time in a true large-area prototype of 9×4 mm2.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2026-01-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145986148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

BioGAP-Ultra: A Modular Edge-AI Platform for Wearable Multimodal Biosignal Acquisition and Processing. BioGAP-Ultra：可穿戴式多模态生物信号采集和处理的模块化边缘ai平台。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2026-01-12 DOI: 10.1109/TBCAS.2026.3652501

Sebastian Frey, Giusy Spacone, Andrea Cossettini, Marco Guermandi, Philipp Schilk, Luca Benini, Victor Kartsch

{"title":"BioGAP-Ultra: A Modular Edge-AI Platform for Wearable Multimodal Biosignal Acquisition and Processing.","authors":"Sebastian Frey, Giusy Spacone, Andrea Cossettini, Marco Guermandi, Philipp Schilk, Luca Benini, Victor Kartsch","doi":"10.1109/TBCAS.2026.3652501","DOIUrl":"https://doi.org/10.1109/TBCAS.2026.3652501","url":null,"abstract":"The growing demand for continuous physiological monitoring and human-machine interaction in realworld settings calls for wearable platforms that are flexible, low-power, and capable of on-device intelligence. This work presents BioGAP-Ultra, an advanced multimodal biosensing platform that supports synchronized acquisition of diverse electrophysiological and hemodynamic signals such as EEG, EMG, ECG, and PPG while enabling embedded AI processing at state-of-the-art energy efficiency. BioGAP-Ultra is a major extension of our previous BioGAP design aimed at meeting the rapidly growing requirements of wearable biosensing applications. It features (i) increased on-device storage (×2 SRAM, ×4 FLASH), (ii) improved wireless connectivity (supporting up to 1.4 Mbit/s bandwidth, ×4 higher than BioGAP), (iii) enhanced number of signal modalities (from 3 to 5) and analog input channels (×2). Further, it is accompanied by a real-time visualization and analysis software suite that supports the hardware design, providing access to raw data and real-time configurability on a mobile phone. Finally, we demonstrate the system's versatility through integration into various wearable form factors: an EEG-PPG headband consuming 32.8 mW, an EMG sleeve at 26.7 mW, and an ECG-PPG chestband requiring only 9.3 mW for continuous acquisition and streaming, tailored for diverse biosignal applications. To showcase its edge-AI capabilities, we further deploy two representative on device applications: (1) ECG-PPG-based PAT estimation at 8.6 mW, and (2) EMG-ACC-based classification of reach-and grasp motion phases, achieving 79.9 % ± 5.7 % accuracy at 23.6 mW. All hardware and software design files are also released open-source with a permissive license.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145961024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Millimeter-sized 0.1pM-LoD Wireless 16-Channel Organic Electrochemical Transistors Based Electrochemical Sensing SoC. 基于电化学传感SoC的毫米尺寸0.1pM-LoD无线16通道有机电化学晶体管。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2026-01-12 DOI: 10.1109/TBCAS.2026.3652162

Yuan Ma, Shangbin Liu, Lingfeng Wu, Yahao Song, Chao Xie, Lan Yin, Milin Zhang

{"title":"Millimeter-sized 0.1pM-LoD Wireless 16-Channel Organic Electrochemical Transistors Based Electrochemical Sensing SoC.","authors":"Yuan Ma, Shangbin Liu, Lingfeng Wu, Yahao Song, Chao Xie, Lan Yin, Milin Zhang","doi":"10.1109/TBCAS.2026.3652162","DOIUrl":"https://doi.org/10.1109/TBCAS.2026.3652162","url":null,"abstract":"This paper proposes a millimeter-sized, high-sensitivity, wide dynamic-range 16-channel electrochemical sensing SoC with integrated thin-film organic electrochemical transistor (OECT), utilizing ultrasonic wireless power and backscatter wireless communication technology. A bidirectional current conveyor and resistor (CC+R) potentiostat with duty-cycle control is introduced to minimize the static current consumption by reducing the duty cycle of the OECT amplification process. Additionally, the programmable gain amplifier's (PGA's) sampling capacitor is repurposed for small current-to-voltage conversion, extending the measurement range with minimal overhead. The system further integrates an active full-wave rectifier with backscatter amplitude modulation, supporting a wide range of received pulse amplitudes, variable time-of-flight (ToF), and tunable ultrasound frequencies. The design is fabricated using a 180 nm CMOS process. Experimental result features a sensing current measurement range of 184 dB, with a minimum current noise of 1.25 pArms. The power consumption of the single-channel system is 16.3 $μ$W. The design was validated for the detection of inflammatory factors, achieving a limit of detection (LoD) as low as 0.1 pM and the linearity with R2 greater than 0.95.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2026-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145961118","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 6.78-MHz Wireless, Mode-Convertible Single-Stage Resonant CC/CV Battery Charger for Implantable Biomedical Devices. 用于植入式生物医学设备的6.78 mhz无线，模式转换单级谐振CC/CV电池充电器。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2026-01-05 DOI: 10.1109/TBCAS.2025.3650167

Byeongwoo Yoo, Joongyu Kim, Minjae Kim, Minsung Kim, Jeongho Choi, Daehong Kim, Gunwook Park, Sung-Yun Park

{"title":"A 6.78-MHz Wireless, Mode-Convertible Single-Stage Resonant CC/CV Battery Charger for Implantable Biomedical Devices.","authors":"Byeongwoo Yoo, Joongyu Kim, Minjae Kim, Minsung Kim, Jeongho Choi, Daehong Kim, Gunwook Park, Sung-Yun Park","doi":"10.1109/TBCAS.2025.3650167","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3650167","url":null,"abstract":"We present a 6.78-MHz wireless, mode-convertible single-stage resonant charger (SSRC) that provides constant current/constant voltage charging in an extended coupling range for implantable biomedical devices. To extend the charging range in a wireless inductive link for reliable and seamless power transfer, it automatically switches between normal and resonant modes (NM and RM) by sensing current variation induced from the frequency splitting phenomenon, thereby achieving an extended charging distance up to 104.34 %. In addition, the proposed charger limits the maximum current to avoid excessive charging, that potentially degrades the battery's health. The prototype SSRC has been fabricated using a 180 nm bipolar/CMOS/DMOS high voltage process with an active area of 0.575 mm2. The performance of the fabricated chip has been characterized on benchtop and ex vivo using a custom-designed 3-D printed fixture. The measurement results verified efficient power delivery to batteries while extending the charging distance from 23 mm to 47 mm in air and a 20-mm-thick pork slice without over-current issues. The measured peak power conversion efficiencies were 89.42 and 76.6 % in the NM and RM, respectively.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2026-01-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145907131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 7 mHz - 6.29 Hz Configurable High-pass Analog Front-end with Direct Tunneling Biasing and Output DC-Servo Loop. 一个7 mHz - 6.29 Hz可配置的高通模拟前端与直接隧道偏置和输出直流伺服回路。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2025-12-29 DOI: 10.1109/TBCAS.2025.3648819

Jing Liang, Haotian Wei, Yanjin Lyu, Yuanqi Hu

{"title":"A 7 mHz - 6.29 Hz Configurable High-pass Analog Front-end with Direct Tunneling Biasing and Output DC-Servo Loop.","authors":"Jing Liang, Haotian Wei, Yanjin Lyu, Yuanqi Hu","doi":"10.1109/TBCAS.2025.3648819","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3648819","url":null,"abstract":"This paper introduces a capacitively coupled analog front-end featuring an adjustable high-pass cutoff frequency range of 7mHz to 6.29 Hz. The DC operating point for the input differential pair is set by the dynamic equilibrium of the direct tunneling (DT) current. An output DC-servo loop (O-DSL), utilizing a duty-cycled operational transconductance amplifier (DC-OTA) together with a digital-assistant transconductance amplifier (DA-OTA), is designed at the main amplifier's output nodes. By employing DC-OTA techniques in the O-DSL, an equivalent transconductance as low as 0.18 pA/V has been achieved, enabling the front-end to reach a 7mHz high-pass cutoff frequency with a 6 pF on-chip integrating capacitor. A DA-OTA technique is used to widen the compensation range for low frequency interference. Additionally, a positive feedback capacitor in conjunction with a dual loop control mechanism is applied to enhance input impedance to 5.2GΩ at 50 Hz within 30 ms calibration time. The front-end is fabricated in a standard 180 nm CMOS process, with a total current consumption of 3.01 μA and 6.37NEF.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145859691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Cardiovascular Disease Classification System with ECG-Gating PCG Algorithm and Programmable AI Accelerator Design. 基于ecg门控PCG算法和可编程AI加速器设计的心血管疾病分类系统。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2025-12-19 DOI: 10.1109/TBCAS.2025.3646017

Shuenn-Yuh Lee, Kuan-Cheng Wang, Ming-Yueh Ku, Ju-Yi Chen

{"title":"Cardiovascular Disease Classification System with ECG-Gating PCG Algorithm and Programmable AI Accelerator Design.","authors":"Shuenn-Yuh Lee, Kuan-Cheng Wang, Ming-Yueh Ku, Ju-Yi Chen","doi":"10.1109/TBCAS.2025.3646017","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3646017","url":null,"abstract":"Cardiovascular diseases (CVDs) are among the leading causes of mortality. Traditional diagnostic methods require hospital visits and professional medical personnel, but the timely detection of cardiac conditions can significantly improve survival rates. Therefore, wearable devices with edge-computing capabilities for real-time cardiovascular diagnosis are highly important. Heart sounds provide valuable information on valve closure; however, variations in heart rhythm or heart valve diseases (HVDs) can complicate the identification of affected valves and the interpretation of heart sound origins. Additionally, different disease classifications require distinct model architectures, posing significant challenges for implementation on wearable devices. This study addresses these challenges through three key contributions: an ECG-gating PCG algorithm, improved classification algorithms for arrhythmia and valvular heart disease, and a systolic array-based accelerator with an application-specific instruction-set processor (ASIP) capable of performing inference on multiple models. The algorithms achieve 97.8% and 99.3% accuracy on the MIT-BIH and heart murmur databases, respectively, with hardware quantization errors below 0.5%. The accelerator is fabricated in TSMC 180 nm CMOS technology, achieving an operating power of 414 $μ$W at 1 MHz. The execution times for arrhythmia and valvular heart disease classification are 7.2 ms and 21 ms, respectively, and the energy efficiency normalized to 40 nm is 395.3 GOPS/W. These show that this system can effectively solve the classification of arrhythmia and heart valve diseases.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145795771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

2025 Index IEEE Transactions on Biomedical Circuits and Systems 2025索引IEEE生物医学电路与系统学报

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2025-12-19 DOI: 10.1109/TBCAS.2025.3646307

引用次数: 0

An artifact-free 290$μ$m²/ch 610nW/ch neural readout frontend with hybrid EDO compensation for high-channel-count closed-loop neuromodulation. 用于高通道计数闭环神经调节的无伪影290$μ$m2/ch 610nW/ch混合EDO补偿的神经读出前端。

IF 4.9

IEEE transactions on biomedical circuits and systems Pub Date : 2025-12-16 DOI: 10.1109/TBCAS.2025.3644137

Marco Francesco Carlino, Georges Gielen

{"title":"An artifact-free 290$μ$m2/ch 610nW/ch neural readout frontend with hybrid EDO compensation for high-channel-count closed-loop neuromodulation.","authors":"Marco Francesco Carlino, Georges Gielen","doi":"10.1109/TBCAS.2025.3644137","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3644137","url":null,"abstract":"Next-generation neurorehabilitation implants demand high-channel-count closed-loop systems with ultra-low area and ultra-low-power readout and classification. This is essential in applications such as multi-type epileptic seizure detection, brain machine interfaces or brain-to-text conversion. Although recent designs achieve compactness and low power, they often cannot record neural signals during stimulation due to large, saturating artifacts. Conversely, artifact-tolerant solutions typically incur excessive area and power overhead to avoid saturation. We introduce a paradigm shift: enabling an ultra-compact, artifact-tolerant readout frontend by permitting brief saturation during stimulation pulses and applying backend interpolation to reconstruct the signals. High-fidelity neural features can thus be extracted with minimal error. To minimize the readout area footprint and to facilitate the routing from many electrodes, we reuse the whole frontend to read-out 64 inputs in a time-multiplexed fashion. Implemented in a 40nm CMOS process, our chip leverages the first published secondorder fully time-based incremental analog-to-digital converter, achieving a state-of-the-art 290-$μ$m2/ch area occupation and only 610-nW/ch of power consumption. The proposed hybrid electrode offset compensation further minimizes the area overhead without significantly compromising the noise or common-mode/power rejection across the full cancellation range. Artifact tolerance is validated in saline using an external stimulator chip. We demonstrate that the error on a broad set of features extracted from interpolated local-field-potential data remains below ±10%, even under harsh stimulation conditions.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9,"publicationDate":"2025-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145776363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0