IEEE transactions on biomedical circuits and systems最新文献_第10页

A 40-nm 169mW Ultrasound Imaging Processor Supporting Advanced Modes for Hand-Held Devices 支持手持设备高级模式的 40 纳米 169mW 超声波成像处理器。

IEEE transactions on biomedical circuits and systems Pub Date : 2024-08-19 DOI: 10.1109/TBCAS.2024.3445968

Yi-Lin Lo;Yu-Chen Lo;Chia-Hsiang Yang

{"title":"A 40-nm 169mW Ultrasound Imaging Processor Supporting Advanced Modes for Hand-Held Devices","authors":"Yi-Lin Lo;Yu-Chen Lo;Chia-Hsiang Yang","doi":"10.1109/TBCAS.2024.3445968","DOIUrl":"10.1109/TBCAS.2024.3445968","url":null,"abstract":"Hand-held ultrasound devices have been widely used in the field of healthcare and power-efficient, real-time imaging is essential. This work presents the world's first ultrasound imaging processor supporting advanced modes, including vector flow imaging and elastography imaging. Plane-wave beamforming is utilized to ensure that the pulse repetition frequency (PRF) is sufficiently high for the advanced mode. The storage size and power consumption are minimized through algorithm-architecture co-optimization. The proposed plane-wave beamforming reduces the storage size of the required delay values by 43.7%. By exchanging the processing order, the storage size is reduced by 78.1% for elastography imaging. Parallel beamforming and interleaved firing are employed to achieve real-time imaging for all the supported modes. Fabricated in 40-nm CMOS technology, the proposed processor integrates 4.7M logic gates in core area of 3.24mm<inline-formula><tex-math>${}^{2}$</tex-math></inline-formula>. This work achieves a 20.3<inline-formula><tex-math>$boldsymbol{times}$</tex-math></inline-formula> higher beamforming rate with 5.3-to-29.1<inline-formula><tex-math>$boldsymbol{times}$</tex-math></inline-formula> lower power consumption than the state-of-the-art design. It also has 60% lower hardware complexity (in terms of gate count), in addition to the capability for supporting the advanced mode.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 2","pages":"428-441"},"PeriodicalIF":0.0,"publicationDate":"2024-08-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142006152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

RVDLAHA: An RISC-V DLA Hardware Architecture for On-Device Real-Time Seizure Detection and Personalization in Wearable Applications RVDLAHA：用于可穿戴应用中设备上实时癫痫发作检测和个性化的 RISC-V DLA 硬件架构。

IEEE transactions on biomedical circuits and systems Pub Date : 2024-08-13 DOI: 10.1109/TBCAS.2024.3442250

Shuenn-Yuh Lee;Ming-Yueh Ku;Yen-Hsing Tsai;Chou-Ching Lin

{"title":"RVDLAHA: An RISC-V DLA Hardware Architecture for On-Device Real-Time Seizure Detection and Personalization in Wearable Applications","authors":"Shuenn-Yuh Lee;Ming-Yueh Ku;Yen-Hsing Tsai;Chou-Ching Lin","doi":"10.1109/TBCAS.2024.3442250","DOIUrl":"10.1109/TBCAS.2024.3442250","url":null,"abstract":"Epilepsy is a globally distributed chronic neurological disorder that may pose a threat to life without warning. Therefore, the use of wearable devices for real-time detection and treatment of epilepsy is crucial. Additionally, personalizing disease detection algorithms for individual users is also a challenge in clinical applications. Some studies have proposed seizure detection algorithms with convolutional neural networks (CNNs) and programmable hardware architectures for speeding up the process of CNN inference. However, personalizing seizure detection algorithms could still not be performed on these hardware architectures. Consequently, this study proposes three key contributions to address the challenges: a real-time seizure detection and personalization algorithm, a programmable reduced instruction set computer-V (RISC-V) deep learning accelerator (DLA) hardware architecture (RVDLAHA), and a dedicated RISC-V DLA (RVDLA) compiler. In animal experiments with lab rats, the proposed CNN-based seizure detection algorithm obtains an accuracy of 99.5% for a 32-bit floating point and an accuracy of 99.3% for a 16-bit fixed point. Additionally, the proposed personalization algorithm increases the testing accuracy across different databases from 85.0% to 92.9%. The RVDLAHA is implemented on Xilinx PYNQ-Z2, with a power consumption of only 0.107 W at an operating frequency of 1 MHz. Each step, including raw data input, preprocessing, detection, and personalization, requires only 17.8, 1.0, 1.1, and 1.3 ms, respectively. With the hardware architecture, the seizure detection and personalization algorithm can provide on-device real-time monitoring.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 1","pages":"40-54"},"PeriodicalIF":0.0,"publicationDate":"2024-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141977492","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 2m-Range 711μW Body Channel Communication Transceiver Featuring Dynamically-Sampling Bias-Free Interface Front End 具有动态采样无偏置接口前端的 2m 范围 711μW 人体信道通信收发器。

IEEE transactions on biomedical circuits and systems Pub Date : 2024-08-07 DOI: 10.1109/TBCAS.2024.3439619

Guanjie Gu;Changgui Yang;Jian Zhao;Sijun Du;Yuxuan Luo;Bo Zhao

{"title":"A 2m-Range 711μW Body Channel Communication Transceiver Featuring Dynamically-Sampling Bias-Free Interface Front End","authors":"Guanjie Gu;Changgui Yang;Jian Zhao;Sijun Du;Yuxuan Luo;Bo Zhao","doi":"10.1109/TBCAS.2024.3439619","DOIUrl":"10.1109/TBCAS.2024.3439619","url":null,"abstract":"Body Channel Communication (BCC) utilizes the body surface as a low-loss signal transmission medium, reducing the power consumption of wireless wearable devices. However, the effective communication range on the human body is limited in the state-of-the-art BCC transceivers, where the signal loss between the body surface and the BCC receiver remains one of the main bottlenecks. To reduce the interface loss, a high input impedance is desired by the BCC receiver, but the DC-biasing circuits decrease the input impedance. In this work, a dynamically-sampling IFE is proposed to eliminate the DC voltage bias, resulting in a 90k<inline-formula><tex-math>$Omega$</tex-math></inline-formula> high input impedance and a 94dB RF<inline-formula><tex-math>$-$</tex-math></inline-formula>IF conversion gain to reduce the interface loss in long-range BCC applications. The BCC transceiver chip is fabricated in 55nm CMOS process, taking a die area of 0.123mm<inline-formula><tex-math>${}^{2}$</tex-math></inline-formula>. Measured results show that the chip extends the BCC range to 2m for both the forward and backward paths, where the transmitter and receiver consume 711<inline-formula><tex-math>$mu$</tex-math></inline-formula>W power in total.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 2","pages":"393-403"},"PeriodicalIF":0.0,"publicationDate":"2024-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141903948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

High-Performance Method and Architecture for Attention Computation in DNN Inference DNN 推断中注意力计算的高性能方法和架构

IEEE transactions on biomedical circuits and systems Pub Date : 2024-08-01 DOI: 10.1109/TBCAS.2024.3436837

Qi Cheng;Xiaofang Hu;He Xiao;Yue Zhou;Shukai Duan

{"title":"High-Performance Method and Architecture for Attention Computation in DNN Inference","authors":"Qi Cheng;Xiaofang Hu;He Xiao;Yue Zhou;Shukai Duan","doi":"10.1109/TBCAS.2024.3436837","DOIUrl":"10.1109/TBCAS.2024.3436837","url":null,"abstract":"In recent years, The combination of Attention mechanism and deep learning has a wide range of applications in the field of medical imaging. However, due to its complex computational processes, existing hardware architectures have high resource consumption or low accuracy, and deploying them efficiently to DNN accelerators is a challenge. This paper proposes an online-programmable Attention hardware architecture based on compute-in-memory (CIM) marco, which reduces the complexity of Attention in hardware and improves integration density, energy efficiency, and calculation accuracy. First, the Attention computation process is decomposed into multiple cascaded combinatorial matrix operations to reduce the complexity of its implementation on the hardware side; second, in order to reduce the influence of the non-ideal characteristics of the hardware, an online-programmable CIM architecture is designed to improve calculation accuracy by dynamically adjusting the weights; and lastly, it is verified that the proposed Attention hardware architecture can be applied for the inference of deep neural networks through Spice simulation. Based on the 100nm CMOS process, compared with the traditional Attention hardware architectures, the integrated density and energy efficiency are increased by at least 91.38 times, and latency and computing efficiency are improved by about 12.5 times.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 2","pages":"404-415"},"PeriodicalIF":0.0,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141876988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

AI Accelerator With Ultralightweight Time-Period CNN-Based Model for Arrhythmia Classification 基于超轻时间周期 CNN 模型的人工智能加速器，用于心律失常分类。

IEEE transactions on biomedical circuits and systems Pub Date : 2024-07-30 DOI: 10.1109/TBCAS.2024.3435718

Shuenn-Yuh Lee;Ming-Yueh Ku;Wei-Cheng Tseng;Ju-Yi Chen

{"title":"AI Accelerator With Ultralightweight Time-Period CNN-Based Model for Arrhythmia Classification","authors":"Shuenn-Yuh Lee;Ming-Yueh Ku;Wei-Cheng Tseng;Ju-Yi Chen","doi":"10.1109/TBCAS.2024.3435718","DOIUrl":"10.1109/TBCAS.2024.3435718","url":null,"abstract":"This work proposes a classification system for arrhythmias, aiming to enhance the efficiency of the diagnostic process for cardiologists. The proposed algorithm includes a naive preprocessing procedure for electrocardiography (ECG) data applicable to various ECG databases. Additionally, this work proposes an ultralightweight model for arrhythmia classification based on a convolutional neural network and incorporating R-peak interval features to represent long-term rhythm information, thereby improving the model's classification performance. The proposed model is trained and tested by using the MIT-BIH and NCKU-CBIC databases in accordance with the classification standards of the Association for the Advancement of Medical Instrumentation (AAMI), achieving high accuracies of 98.32% and 97.1%. This work applies the arrhythmia classification algorithm to a web-based system, thus providing a graphical interface. The cloud-based execution of automated artificial intelligence (AI) classification allows cardiologists and patients to view ECG wave conditions instantly, thereby remarkably enhancing the quality of medical examination. This work also designs a customized integrated circuit for the hardware implementation of an AI accelerator. The accelerator utilizes a parallelized processing element array architecture to perform convolution and fully connected layer operations. It introduces proposed hybrid stationary techniques, combining input and weight stationary modes to increase data reuse drastically and reduce hardware execution cycles and power consumption, ultimately achieving high-performance computing. This accelerator is implemented in the form of a chip by using the TSMC 180 nm CMOS process. It exhibits a power consumption of 122 µW, a classification latency of 6.8 ms, and an energy efficiency of 0.83 µJ/classification.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 1","pages":"16-27"},"PeriodicalIF":0.0,"publicationDate":"2024-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141857446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Active Neural Interface Circuits and Systems for Selective Control of Peripheral Nerves: A Review 用于选择性控制外周神经的主动神经接口电路和系统：综述。

IEEE transactions on biomedical circuits and systems Pub Date : 2024-07-17 DOI: 10.1109/TBCAS.2024.3430038

Maryam Habibollahi;Dai Jiang;Henry Thomas Lancashire;Andreas Demosthenous

引用次数: 0

A Power-Efficient Envelope-Detector-Less Amplitude-Shift-Keying Forward Telemetry for Wirelessly Powered Biomedical Devices 用于无线供电生物医学设备的高能效无包络探测器移幅键控前向遥测技术。

IEEE transactions on biomedical circuits and systems Pub Date : 2024-07-12 DOI: 10.1109/TBCAS.2024.3427396

Hyun-Su Lee;Hyung-Min Lee

{"title":"A Power-Efficient Envelope-Detector-Less Amplitude-Shift-Keying Forward Telemetry for Wirelessly Powered Biomedical Devices","authors":"Hyun-Su Lee;Hyung-Min Lee","doi":"10.1109/TBCAS.2024.3427396","DOIUrl":"10.1109/TBCAS.2024.3427396","url":null,"abstract":"This paper proposes an envelope-detector-less (EDL) amplitude-shift-keying (ASK) forward telemetry (FT) demodulator for wireless power/data transfer (WPDT) systems. The EDL ASK FT demodulator can substitute bulky and power-hungry components, which are an envelope detector and an analog comparator in the conventional ASK FT demodulator, with a digital controller, reducing both power dissipation and chip area. The proposed demodulator shares the gate control signals of pass transistors, which are used in an ac-dc regulator for wireless power reception, to maintain a constant load voltage while efficiently demodulating the forward telemetry data. Also, a proposed digital cleaner in the EDL demodulator refines this control signal into a wide pulse without suffering from resonant frequency noise, while a synchronizer can align its frequency with the data rate and resonant frequency. The 0.25-µm CMOS prototype chip of the proposed power-path-less EDL ASK FT demodulator, equipped with the ac-dc regulator, demonstrates a significant 38.2% reduction in power dissipation compared to the conventional ASK FT demodulator. Moreover, the EDL ASK FT demodulator occupies only 0.023-mm2 silicon area and achieves a low bit error rate (BER) less than 10−4 while maintaining a regulated voltage of 4.5 V on the load.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 2","pages":"374-384"},"PeriodicalIF":0.0,"publicationDate":"2024-07-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141602354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Wearable Dual-Mode Probe for Image-Guided Closed-Loop Ultrasound Neuromodulation 用于图像引导闭环超声神经调制的可穿戴双模探头

IEEE transactions on biomedical circuits and systems Pub Date : 2024-07-11 DOI: 10.1109/TBCAS.2024.3425858

Junjun Huan;Vida Pashaei;Steve J. A. Majerus;Swarup Bhunia;Soumyajit Mandal

{"title":"A Wearable Dual-Mode Probe for Image-Guided Closed-Loop Ultrasound Neuromodulation","authors":"Junjun Huan;Vida Pashaei;Steve J. A. Majerus;Swarup Bhunia;Soumyajit Mandal","doi":"10.1109/TBCAS.2024.3425858","DOIUrl":"10.1109/TBCAS.2024.3425858","url":null,"abstract":"Low-intensity focused ultrasound (FUS) is an emerging non-invasive and spatially/temporally precise method for modulating the firing rates and patterns of peripheral nerves. This paper describes an image-guided platform for chronic and patient-specific FUS neuromodulation. The system uses custom wearable probes containing separate ultrasound imaging and modulation transducer arrays realized using piezoelectric transducers assembled on a flexible printed circuit board (PCB). Dual-mode probes operating around 4 MHz (imaging) and 1.3 MHz (modulation) were fabricated and tested on tissue phantoms. The resulting B-mode images were analyzed using a template-matching algorithm to estimate the location of the target nerve and then direct the modulation beam toward the target. The ultrasound transmit voltage used to excite the modulation array was optimized in real-time by automatically regulating functional feedback signals (the average rates of emulated muscle twitches detected by an on-board motion sensor) through a proportional and integral (PI) controller, thus providing robustness to inter-subject variability and probe positioning errors. The proposed closed-loop neuromodulation paradigm was experimentally demonstrated <italic>in vitro using an active tissue phantom that integrates models of the posterior tibial nerve and nearby blood vessels together with embedded sensors and actuators.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 2","pages":"357-373"},"PeriodicalIF":0.0,"publicationDate":"2024-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141592372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Low-Power Fully Integrated 256-Channel Nanowire Electrode-on-Chip Neural Interface for Intracellular Electrophysiology 用于细胞内电生理学的低功耗全集成 256 通道纳米线片上电极神经接口。

IEEE transactions on biomedical circuits and systems Pub Date : 2024-07-10 DOI: 10.1109/TBCAS.2024.3407794

Jun Wang;Ren Liu;Youngbin Tchoe;Alessio Paolo Buccino;Akshay Paul;Deborah Pre;Agnieszka D'Antonio-Chronowska;Frazer A. Kelly;Anne G. Bang;Chul Kim;Shadi Dayeh;Gert Cauwenberghs

{"title":"Low-Power Fully Integrated 256-Channel Nanowire Electrode-on-Chip Neural Interface for Intracellular Electrophysiology","authors":"Jun Wang;Ren Liu;Youngbin Tchoe;Alessio Paolo Buccino;Akshay Paul;Deborah Pre;Agnieszka D'Antonio-Chronowska;Frazer A. Kelly;Anne G. Bang;Chul Kim;Shadi Dayeh;Gert Cauwenberghs","doi":"10.1109/TBCAS.2024.3407794","DOIUrl":"10.1109/TBCAS.2024.3407794","url":null,"abstract":"Intracellular electrophysiology, a vital and versatile technique in cellular neuroscience, is typically conducted using the patch-clamp method. Despite its effectiveness, this method poses challenges due to its complexity and low throughput. The pursuit of multi-channel parallel neural intracellular recording has been a long-standing goal, yet achieving reliable and consistent scaling has been elusive because of several technological barriers. In this work, we introduce a micropower integrated circuit, optimized for scalable, high-throughput <italic>in vitro intrinsically intracellular electrophysiology. This system is capable of simultaneous recording and stimulation, implementing all essential functions such as signal amplification, acquisition, and control, with a direct interface to electrodes integrated on the chip. The electrophysiology system-on-chip (eSoC), fabricated in 180nm CMOS, measures 2.236 mm <inline-formula><tex-math>$times$</tex-math></inline-formula> 2.236 mm. It contains four 8 <inline-formula><tex-math>$times$</tex-math></inline-formula> 8 arrays of nanowire electrodes, each with a 50 <inline-formula><tex-math>$mu$</tex-math></inline-formula>m pitch, placed over the top-metal layer on the chip surface, totaling 256 channels. Each channel has a power consumption of 0.47 <inline-formula><tex-math>$mu$</tex-math></inline-formula>W, suitable for current stimulation and voltage recording, and covers 80 dB adjustable range at a sampling rate of 25 kHz. Experimental recordings with the eSoC from cultured neurons <italic>in vitro validate its functionality in accurately resolving chemically induced multi-unit intracellular electrical activity.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 1","pages":"196-208"},"PeriodicalIF":0.0,"publicationDate":"2024-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141581899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Standard-Cell-Based Neuro-Inspired Integrate-and-Fire Analog-to-Time Converter for Biological and Low-Frequency Signals — Comparison With Analog Version 用于生物和低频信号的基于标准细胞的神经启发式集成与发射模-时转换器--与模拟版本的比较。

IEEE transactions on biomedical circuits and systems Pub Date : 2024-07-04 DOI: 10.1109/TBCAS.2024.3422282

Miguel Lima Teixeira;João P. Oliveira;José C. Príncipe;João Goes

{"title":"A Standard-Cell-Based Neuro-Inspired Integrate-and-Fire Analog-to-Time Converter for Biological and Low-Frequency Signals — Comparison With Analog Version","authors":"Miguel Lima Teixeira;João P. Oliveira;José C. Príncipe;João Goes","doi":"10.1109/TBCAS.2024.3422282","DOIUrl":"10.1109/TBCAS.2024.3422282","url":null,"abstract":"Continuous-time asynchronous data converters namely, analog-to-digital converters and analog-to-time converters, can be beneficial for certain types of applications, such as, processing of biological signals with sparse information. A particular case of these converters is the integrate-and-fire converter (IFC) that is inspired by the neural system. If it is possible to develop a standard-cell-based (SCB) IFC circuit to perform well in advanced technology nodes, it will benefit from the simplicity of SCB circuit designs and can be implemented in widely available field-programmable gate arrays (FPGAs). This way, this paper proposes two IFC circuits designed and prototyped in a 130 nm CMOS standard process. The first is a novel SCB open-loop dynamic IFC. The latter, is a closed-loop analog IFC with conventional blocks. This paper presents a through comparison between the two IFC circuits. They have a power dissipation of 59 \u0000<inline-formula><tex-math>$boldsymbol{mu}$</tex-math></inline-formula>\u0000W and 53 \u0000<inline-formula><tex-math>$boldsymbol{mu}$</tex-math></inline-formula>\u0000W, and an energy \u0000<italic>per\u0000 pulse of 18 pJ and 1060 pJ, SCB and analog IFC, respectively. The SCB IFC has one of the lowest energy \u0000<italic>per\u0000 pulse consumption reported for IFC circuits. The analog IFC, being fully differential, is to our knowledge the first of its kind. Moreover, they do not require an external clock. They can convert signals with a peak-to-peak amplitude from 1.6 mV to 28 mV and 0.6 mV to 2.4 mV, and a frequency range of 2 Hz to 42 kHz and 10 Hz to 4 kHz, SCB and analog IFC, respectively. Presenting low normalized RMS conversion plus reconstruction errors, below 5.2%. The maximum pulse density (average firing-rate) is 3300 kHz, for the SCB and 50 kHz, for the analog IFC.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 4","pages":"861-871"},"PeriodicalIF":0.0,"publicationDate":"2024-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141536192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0