IEEE transactions on biomedical circuits and systems最新文献

{"title":"Vina-FPGA-Cluster: Multi-FPGA Based Molecular Docking Tool With High-Accuracy and Multi-Level Parallelism","authors":"Ming Ling;Zhihao Feng;Ruiqi Chen;Yi Shao;Shidi Tang;Yanxiang Zhu","doi":"10.1109/TBCAS.2024.3388323","DOIUrl":"10.1109/TBCAS.2024.3388323","url":null,"abstract":"AutoDock Vina (Vina) stands out among numerous molecular docking tools due to its precision and comparatively high speed, playing a key role in the drug discovery process. Hardware acceleration of Vina on FPGA platforms offers a high energy-efficiency approach to speed up the docking process. However, previous FPGA-based Vina accelerators exhibit several shortcomings: 1) Simple uniform quantization results in inevitable accuracy drop; 2) Due to Vina's complex computing process, the evaluation and optimization phase for hardware design becomes extended; 3) The iterative computations in Vina constrain the potential for further parallelization. 4) The system's scalability is limited by its unwieldy architecture. To address the above challenges, we propose Vina-FPGA-cluster, a multi-FPGA-based molecular docking tool enabling high-accuracy and multi-level parallel Vina acceleration. Standing upon the shoulders of Vina-FPGA, we first adapt hybrid fixed-point quantization to minimize accuracy loss. We then propose a SystemC-based model, accelerating the hardware accelerator architecture design evaluation. Next, we propose a novel bidirectional AG module for data-level parallelism. Finally, we optimize the system architecture for scalable deployment on multiple Xilinx ZCU104 boards, achieving task-level parallelism. Vina-FPGA-cluster is tested on three representative molecular docking datasets. The experiment results indicate that in the context of RMSD (for successful docking outcomes with metrics below 2Å), Vina-FPGA-cluster shows a mere 0.2% lose. Relative to CPU and Vina-FPGA, Vina-FPGA-cluster achieves 27.33\u0000<inline-formula><tex-math>$times$</tex-math></inline-formula>\u0000 and 7.26\u0000<inline-formula><tex-math>$times$</tex-math></inline-formula>\u0000 speedup, respectively. Notably, Vina-FPGA-cluster is able to deliver the 1.38\u0000<inline-formula><tex-math>$times$</tex-math></inline-formula>\u0000 speedup as GPU implementation (Vina-GPU), with just the 28.99% power consumption.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 6","pages":"1321-1337"},"PeriodicalIF":0.0,"publicationDate":"2024-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567776","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Fingertip-Mimicking 12$times$16 200 $mu$m-Resolution e-Skin Taxel Readout Chip With Per-Taxel Spiking Readout and Embedded Receptive Field Processing","authors":"Mark Daniel Alea;Ali Safa;Flavio Giacomozzi;Andrea Adami;Inci Rüya Temel;Maria Atalaia Rosa;Leandro Lorenzelli;Georges Gielen","doi":"10.1109/TBCAS.2024.3387545","DOIUrl":"10.1109/TBCAS.2024.3387545","url":null,"abstract":"This paper presents an electronic skin (\u0000<italic>e</i>\u0000-skin) taxel array readout chip in 0.18\u0000<inline-formula><tex-math>$mu$</tex-math></inline-formula>\u0000m CMOS technology, achieving the highest reported spatial resolution of 200\u0000<inline-formula><tex-math>$mu$</tex-math></inline-formula>\u0000m, comparable to human fingertips. A key innovation is the integration on chip of a 12\u0000<inline-formula><tex-math>$times$</tex-math></inline-formula>\u000016 polyvinylidene fluoride (PVDF)-based piezoelectric sensor array with per-taxel signal conditioning frontend and spiking readout combined with local embedded neuromorphic first-order processing through Complex Receptive Fields (CRFs). Experimental results show that Spiking Neural Network (SNN)-based classification of the chip's spatiotemporal spiking output for input tactile stimuli such as texture and flutter frequency achieves excellent accuracies up to 97.1\u0000<inline-formula><tex-math>$%$</tex-math></inline-formula>\u0000 and 99.2\u0000<inline-formula><tex-math>$%$</tex-math></inline-formula>\u0000, respectively. SNN-based classification of the indentation period applied to the on-chip PVDF sensors achieved 95.5\u0000<inline-formula><tex-math>$%$</tex-math></inline-formula>\u0000 classification accuracy, despite using only a small 256-neuron SNN classifier, a low equivalent spike encoding resolution of 3-5 bits, and a sub-Nyquist 2.2kevent/s population spiking rate, a state-of-the-art power consumption of 12.33nW per-taxel, and 75\u0000<inline-formula><tex-math>$mu$</tex-math></inline-formula>\u0000W-5mW for the entire chip is obtained. Finally, a comparison of the texture classification accuracies between two on-chip spike encoder outputs shows that the proposed neuromorphic level-crossing sampling (N-LCS) architecture with a decaying threshold outperforms the conventional bipolar level-crossing sampling (LCS) architecture with fixed threshold.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 6","pages":"1308-1320"},"PeriodicalIF":0.0,"publicationDate":"2024-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An Energy-Efficient ECG Processor With Ultra-Low-Parameter Multistage Neural Network and Optimized Power-of-Two Quantization","authors":"Zuo Zhang;Yunqi Guan;WenBin Ye","doi":"10.1109/TBCAS.2024.3385993","DOIUrl":"10.1109/TBCAS.2024.3385993","url":null,"abstract":"This work presents an energy-efficient ECG processor designed for Cardiac Arrhythmia Classification. The processor integrates a pre-processing and neural network accelerator, achieved through algorithm-hardware co-design to optimize hardware resources. We propose a lightweight two-stage neural network architecture, where the first stage includes discrete wavelet transform and an ultra-low-parameter multilayer perceptron (MLP) network, and the second stage utilizes group convolution and channel shuffle. Both stages leverage neural networks for hardware resource reuse and feature a reconfigurable processing element array and memory blocks adapted to the proposed two-stage structure to efficiently handle various convolution and MLP layers operations in the two-stage network. Additionally, an optimized power-of-two (OPOT) quantization technique is proposed to enhance accuracy in low-bit quantization, and a multiplier-less processing element structure tailored for the OPOT weight quantization is introduced. The ECG processor was implemented on a 65nm CMOS process technology with 4KB of SRAM memory, achieving an energy consumption per inference of 0.15 uJ with a power supply of 1V, 64% energy saving compared to the recent state-of-the-art work. Under 4-bit weight precision, the 5-class ECG signal classification accuracy reached 98.59% on the MIT-BIH arrhythmia dataset.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 6","pages":"1296-1307"},"PeriodicalIF":0.0,"publicationDate":"2024-04-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"SC-PLR: An Approximate Spiking Neural Network Accelerator With On-Chip Predictive Learning Rule","authors":"Wei Liu;Shanlin Xiao;Yue Liu;Zhiyi Yu","doi":"10.1109/TBCAS.2024.3385235","DOIUrl":"10.1109/TBCAS.2024.3385235","url":null,"abstract":"The brain's ability to anticipate future events is crucial for intelligent behavior. However, when deploying the capability to edge devices, there are huge challenges in terms of resources and power consumption. The main obstacle is the state-of-the-art neuromorphic hardware with Spike Timing Dependent Plasticity (STDP) learning rule requires significant computation for synaptic weight updates and memory to store intermediate synaptic weights. In this paper, we proposed an approximate Spiking Neural Network (SNN) accelerator with on-chip Predictive Learning Rule (PLR), which is a biological behavior observed in the brain, named SC-PLR. In SC-PLR, the principles of predictive processing are extended to enable neurons to learn temporal sequences and anticipate future events with minimum synaptic weight updates, while stochastic computing is leveraged to balance the hardware cost, energy efficiency, and accuracy. Simulation results demonstrate that PLR-based SNNs effectively enable adaptive and anticipatory behavior in robotics and decision-making scenarios. Additionally, FPGA implementation results show that the proposed SC-PLR outperforms state-of-the-art STDP-based SNN designs in terms of resources and power consumption. Specifically, our design achieves significant resource savings, including 77.3% Look-Up Table (LUT), 79.4% Flip-Flop (FF), and 56.4% Block RAM (BRAM) resources, and power consumption reduction by 32%.\u0000<xref>¹</xref>\u0000<fn><label>¹</label><p>The code is available at <uri>https://github.com/lucy-weizi/SC-PLR</uri>.</p></fn>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 5","pages":"1156-1165"},"PeriodicalIF":0.0,"publicationDate":"2024-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"3D Position Tracking Using On-Chip Magnetic Sensing in Image-Guided Navigation Bronchoscopy","authors":"Manish Srivastava;Kilian O’Donoghue;Aleksandr Sidun;Herman Alexander Jaeger;Alessandro Ferro;Daragh Crowley;Christian van den Bosch;Marcus Kennedy;Daniel O’Hare;Pádraig Cantillon-Murphy","doi":"10.1109/TBCAS.2024.3384016","DOIUrl":"10.1109/TBCAS.2024.3384016","url":null,"abstract":"This paper presents a compact and low-cost on-chip sensor and readout circuit. The sensor achieves high-resolution 5-degrees-of-freedom (DoF) tracking (x, y, z, yaw, and pitch). With the help of an external wire wound sensor, it can also achieve high-resolution 6-degrees-of-freedom (DoF) tracking (x, y, z, yaw, pitch, and roll angles). The sensor uses low-frequency magnetic fields to detect the position and orientation of instruments, providing a viable alternative to using X-rays in image-guided surgery. To measure the local magnetic field, a highly miniaturised on-chip magnetic sensor capable of sensing the magnetic field has been developed incorporating an on-chip magnetic sensor coil, analog-front end, continuous-time \u0000<inline-formula><tex-math>$DeltaSigma$</tex-math></inline-formula>\u0000 analog-to-digital converter (ADC), LVDS transmitter, bandgap reference, and voltage regulator. The microchip is fabricated using 65 nm CMOS technology and occupies an area of 1.06 mm\u0000<inline-formula><tex-math>${}^{2}$</tex-math></inline-formula>\u0000, the smallest reported among similar designs to the best of our knowledge. The 5-DoF system accurately navigates with a precision of 1.1 mm within the volume-of-interest (VOI) of 15\u0000<inline-formula><tex-math>$times$</tex-math></inline-formula>\u000015\u0000<inline-formula><tex-math>$times$</tex-math></inline-formula>\u000015 cm\u0000<inline-formula><tex-math>${}^{3}$</tex-math></inline-formula>\u0000. The 6-DoF system achieves a navigation accuracy of 0.8 mm and an angular error of 1.1 degrees in the same VOI. These results were obtained at a 20 Hz update rate in benchtop characterisation. The prototype sensor demonstrates accurate position tracking in real-life pre-clinical \u0000<italic>in-vivo</i>\u0000 settings within the porcine lung of a live swine, achieving a reported worst-case registration accuracy of 5.8 mm.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 5","pages":"1123-1139"},"PeriodicalIF":0.0,"publicationDate":"2024-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140567884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Together, We are advance technology","authors":"","doi":"10.1109/TBCAS.2024.3381731","DOIUrl":"https://doi.org/10.1109/TBCAS.2024.3381731","url":null,"abstract":"","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 2","pages":"475-475"},"PeriodicalIF":0.0,"publicationDate":"2024-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10487130","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140340074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"IEEE Transactions on Biomedical Circuits and Systems Publication Information","authors":"","doi":"10.1109/TBCAS.2024.3377328","DOIUrl":"https://doi.org/10.1109/TBCAS.2024.3377328","url":null,"abstract":"","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 2","pages":"C2-C2"},"PeriodicalIF":0.0,"publicationDate":"2024-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10487129","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140339932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Blank Page","authors":"","doi":"10.1109/TBCAS.2024.3377332","DOIUrl":"https://doi.org/10.1109/TBCAS.2024.3377332","url":null,"abstract":"","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 2","pages":"C4-C4"},"PeriodicalIF":0.0,"publicationDate":"2024-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10487133","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140340153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Guest Editorial—Selected Papers From the 2023 IEEE International Symposium on Circuits and Systems","authors":"Hanjun Jiang;Ulkuhan Guler;Marco Carminati","doi":"10.1109/TBCAS.2024.3376888","DOIUrl":"https://doi.org/10.1109/TBCAS.2024.3376888","url":null,"abstract":"","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 2","pages":"234-235"},"PeriodicalIF":0.0,"publicationDate":"2024-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10487138","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140339977","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"TechRxiv: Share Your Preprint Research with the World!","authors":"","doi":"10.1109/TBCAS.2024.3381729","DOIUrl":"https://doi.org/10.1109/TBCAS.2024.3381729","url":null,"abstract":"","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 2","pages":"474-474"},"PeriodicalIF":0.0,"publicationDate":"2024-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10487131","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140340073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}