IEEE transactions on biomedical circuits and systems最新文献

{"title":"A Wearable Dual-Mode Probe for Image-Guided Closed-Loop Ultrasound Neuromodulation.","authors":"Junjun Huan, Vida Pashaei, Steve J A Majerus, Swarup Bhunia, Soumyajit Mandal","doi":"10.1109/TBCAS.2024.3425858","DOIUrl":"https://doi.org/10.1109/TBCAS.2024.3425858","url":null,"abstract":"<p><p>Low-intensity focused ultrasound (FUS) is an emerging non-invasive and spatially/temporally precise method for modulating the firing rates and patterns of peripheral nerves. This paper describes an image-guided platform for chronic and patient-specific FUS neuromodulation. The system uses custom wearable probes containing separate ultrasound imaging and modulation transducer arrays realized using piezoelectric transducers assembled on a flexible printed circuit board (PCB). Dual-mode probes operating around 4 MHz (imaging) and 1.3 MHz (modulation) were fabricated and tested on tissue phantoms. The resulting B-mode images were analyzed using a template-matching algorithm to estimate the location of the target nerve and then direct the modulation beam toward the target. The ultrasound transmit voltage used to excite the modulation array was optimized in real-time by automatically regulating functional feedback signals (the average rates of emulated muscle twitches detected by an on-board motion sensor) through a proportional and integral (PI) controller, thus providing robustness to inter-subject variability and probe positioning errors. The proposed closed-loop neuromodulation paradigm was experimentally demonstrated in vitro using an active tissue phantom that integrates models of the posterior tibial nerve and nearby blood vessels together with embedded sensors and actuators.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141592372","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low-Power Fully Integrated 256-Channel Nanowire Electrode-on-Chip Neural Interface for Intracellular Electrophysiology","authors":"Jun Wang;Ren Liu;Youngbin Tchoe;Alessio Paolo Buccino;Akshay Paul;Deborah Pre;Agnieszka D'Antonio-Chronowska;Frazer A. Kelly;Anne G. Bang;Chul Kim;Shadi Dayeh;Gert Cauwenberghs","doi":"10.1109/TBCAS.2024.3407794","DOIUrl":"10.1109/TBCAS.2024.3407794","url":null,"abstract":"Intracellular electrophysiology, a vital and versatile technique in cellular neuroscience, is typically conducted using the patch-clamp method. Despite its effectiveness, this method poses challenges due to its complexity and low throughput. The pursuit of multi-channel parallel neural intracellular recording has been a long-standing goal, yet achieving reliable and consistent scaling has been elusive because of several technological barriers. In this work, we introduce a micropower integrated circuit, optimized for scalable, high-throughput <italic>in vitro</i> intrinsically intracellular electrophysiology. This system is capable of simultaneous recording and stimulation, implementing all essential functions such as signal amplification, acquisition, and control, with a direct interface to electrodes integrated on the chip. The electrophysiology system-on-chip (eSoC), fabricated in 180nm CMOS, measures 2.236 mm <inline-formula><tex-math>$times$</tex-math></inline-formula> 2.236 mm. It contains four 8 <inline-formula><tex-math>$times$</tex-math></inline-formula> 8 arrays of nanowire electrodes, each with a 50 <inline-formula><tex-math>$mu$</tex-math></inline-formula>m pitch, placed over the top-metal layer on the chip surface, totaling 256 channels. Each channel has a power consumption of 0.47 <inline-formula><tex-math>$mu$</tex-math></inline-formula>W, suitable for current stimulation and voltage recording, and covers 80 dB adjustable range at a sampling rate of 25 kHz. Experimental recordings with the eSoC from cultured neurons <italic>in vitro</i> validate its functionality in accurately resolving chemically induced multi-unit intracellular electrical activity.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 1","pages":"196-208"},"PeriodicalIF":0.0,"publicationDate":"2024-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141581899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Standard-Cell-Based Neuro-Inspired Integrate-and-Fire Analog-to-Time Converter for Biological and Low-Frequency Signals — Comparison With Analog Version","authors":"Miguel Lima Teixeira;João P. Oliveira;José C. Príncipe;João Goes","doi":"10.1109/TBCAS.2024.3422282","DOIUrl":"10.1109/TBCAS.2024.3422282","url":null,"abstract":"Continuous-time asynchronous data converters namely, analog-to-digital converters and analog-to-time converters, can be beneficial for certain types of applications, such as, processing of biological signals with sparse information. A particular case of these converters is the integrate-and-fire converter (IFC) that is inspired by the neural system. If it is possible to develop a standard-cell-based (SCB) IFC circuit to perform well in advanced technology nodes, it will benefit from the simplicity of SCB circuit designs and can be implemented in widely available field-programmable gate arrays (FPGAs). This way, this paper proposes two IFC circuits designed and prototyped in a 130 nm CMOS standard process. The first is a novel SCB open-loop dynamic IFC. The latter, is a closed-loop analog IFC with conventional blocks. This paper presents a through comparison between the two IFC circuits. They have a power dissipation of 59 \u0000<inline-formula><tex-math>$boldsymbol{mu}$</tex-math></inline-formula>\u0000W and 53 \u0000<inline-formula><tex-math>$boldsymbol{mu}$</tex-math></inline-formula>\u0000W, and an energy \u0000<italic>per</i>\u0000 pulse of 18 pJ and 1060 pJ, SCB and analog IFC, respectively. The SCB IFC has one of the lowest energy \u0000<italic>per</i>\u0000 pulse consumption reported for IFC circuits. The analog IFC, being fully differential, is to our knowledge the first of its kind. Moreover, they do not require an external clock. They can convert signals with a peak-to-peak amplitude from 1.6 mV to 28 mV and 0.6 mV to 2.4 mV, and a frequency range of 2 Hz to 42 kHz and 10 Hz to 4 kHz, SCB and analog IFC, respectively. Presenting low normalized RMS conversion plus reconstruction errors, below 5.2%. The maximum pulse density (average firing-rate) is 3300 kHz, for the SCB and 50 kHz, for the analog IFC.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 4","pages":"861-871"},"PeriodicalIF":0.0,"publicationDate":"2024-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141536192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 62.2dB SNDR Event-Driven Level-Crossing ADC with SAR-Assisted Delay Compensation Loop for Time-Sparse Biomedical Signal Acquisition.","authors":"Mengyu Li, Yi Huo, Shuang Song, Wanyuan Qu, Le Ye, Menglian Zhao, Zhichao Tan","doi":"10.1109/TBCAS.2024.3423366","DOIUrl":"https://doi.org/10.1109/TBCAS.2024.3423366","url":null,"abstract":"<p><p>This paper proposed an event-driven clockless level-crossing ADC (LC-ADC) suitable for biomedical applications. Thanks to the LC loop, the sampling rate of the converter automatically adapts to the input activities. Activity-dependent power consumption and data compression can thus be realized, saving system power, especially during time-sparse signal acquisition. Meanwhile, a SAR-assisted loop is exploited to resolve the loop-delay-induced distortion in conventional LC-ADC. Therefore, the resolution and power efficiency of the LC-ADC are improved effectively while maintaining the event-driven feature. Implemented in a 55nm process, the proposed LC-ADC achieves a scalable power consumption and a peak SNDR of 62.2dB for a 20kHz input. It also achieves a Walden FoM of 29.7fJ/conv.-step and a Schreier FoM of 158.6dB, which is best in class, without using off-chip calibration. Sub μW power is realized when the input frequency is below 1.5kHz. The proposed LC-ADC is also verified by simulated electrocardiogram (ECG), neural spike, and electromyogram (EMG) signals. It provides a ~7X data compression for ECG input, providing an attractive solution for time-sparse signal acquisition in biomedical applications.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141536191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low-Power Analog Integrated Architecture of the Voting Classification Algorithm for Diabetes Disease Prediction","authors":"Vassilis Alimisis;Charis Aletraris;Nikolaos P. Eleftheriou;Emmanouil Anastasios Serlis;Alex James;Paul P. Sotiriadis","doi":"10.1109/TBCAS.2024.3421313","DOIUrl":"10.1109/TBCAS.2024.3421313","url":null,"abstract":"A low-power (<inline-formula><tex-math>$boldsymbol{sim}$</tex-math></inline-formula> 600nW), fully analog integrated architecture for a voting classification algorithm is introduced. It can effectively handle multiple-input features, maintaining exceptional levels of accuracy and with very low power consumption. The proposed architecture is based on a versatile Voting algorithm that selectively incorporates one of three key classification models: Bayes or Centroid, or, the Learning Vector Quantization model; all of which are implemented using Gaussian-likelihood and Euclidean distance function circuits, as well as a current comparison circuit. To evaluate the proposed architecture, a comprehensive comparison with popular analog classifiers is performed, using real-life diabetes dataset. All model architectures were trained using Python and compared with the software-based classifiers. The circuit implementations were performed using the TSMC <inline-formula><tex-math>$90$</tex-math></inline-formula> nm CMOS process technology and the Cadence IC Suite was utilized for the design, schematic and post-layout simulations. The proposed classifiers achieved sensitivity of <inline-formula><tex-math>${boldsymbol{geq}}96.7%$</tex-math></inline-formula> and specificity of <inline-formula><tex-math>${boldsymbol{geq}}89.7%$</tex-math></inline-formula>.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 1","pages":"93-107"},"PeriodicalIF":0.0,"publicationDate":"2024-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141494586","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 10-Channel, 120 nW/Channel, Reconfigurable Capacitance-to-Digital Converter for Sub-$mu$W Robust Wearable Sensing","authors":"Omar Faruqe;Daehyun Lee;Natalie B. Ownby;Benton H. Calhoun","doi":"10.1109/TBCAS.2024.3420871","DOIUrl":"10.1109/TBCAS.2024.3420871","url":null,"abstract":"This paper presents a 10-channel, 120 nW/channel, reconfigurable capacitance-to-digital converter (CDC) enabling sub-\u0000<inline-formula><tex-math>$mu$</tex-math></inline-formula>\u0000W wearable sensing applications. The proposed multi-channel architecture supports 10 channels with a shared reconfigurable 6-bit differential analog-to-digital converter (ADC). The reconfigurable nature of the CDC enables adaptive sensing range and sensing speed based on the target application. Furthermore, the architecture performs both on/off-chip parasitic correction and baseline calibration to measure the change in capacitance (\u0000<inline-formula><tex-math>$mathbf{Delta C}$</tex-math></inline-formula>\u0000), excluding baseline and parasitic capacitances. The experimental results show the measurement range of \u0000<inline-formula><tex-math>$mathbf{Delta C}$</tex-math></inline-formula>\u0000 are 5.34 pF for 1x sensitivity and 1.8 pF for 3x sensitivity respectively. The capacitive divider-based architecture excludes power-hungry operational trans-impedance amplifiers for capacitance to voltage conversion, and the architecture supports programmable channel access to activate or deactivate each channel independently. The random interrupt protection logic avoids any broken sample or data error in a sampling window. Additionally, the channel monitoring logic helps keep track of specific channel information. The measured silicon result shows a total power consumption of 1.2 \u0000<inline-formula><tex-math>$mathbf{mu}$</tex-math></inline-formula>\u0000W for 1.6 kHz sampling frequency when driven by a 32 kHz clock, which is 8.6x less than prior works. The CDC is also tested with DMMP (dimethyl-methylphosphonate) gas sensor in gas chromatography (GC). Implemented in 65 nm CMOS process, the 10-channel CDC occupies 0.251 \u0000<inline-formula><tex-math>$mathbf{mm^{2}}$</tex-math></inline-formula>\u0000 of active area (0.0251 \u0000<inline-formula><tex-math>$mathbf{mm^{2}}$</tex-math></inline-formula>\u0000/Ch).","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 4","pages":"849-860"},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141478180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Silicon-Based Piezoresistive Stress Sensor Arrays for Use in Flexible Tactile Skin","authors":"Vartika Verma;Alex Nogué I Torrent;Danko Petrić;Valentin Haberhauer;Ralf Brederlow","doi":"10.1109/TBCAS.2024.3420171","DOIUrl":"10.1109/TBCAS.2024.3420171","url":null,"abstract":"Bioinspired robotics and smart prostheses have many applications in the healthcare sector. Patients can use them for rehabilitation or day-to-day assistance, allowing them to regain some agency over their movements. The most common way to make these smart artificial limbs is by adding a “human-like” electronic skin to detect force and emulate touch detection. This paper presents a fully integrated CMOS-based stress sensor design with a high dynamic range (100 kPa to 100 MPa) supported by an adaptive gain-controlled chopping amplifier. The sensor chip includes four identical sensing structures capable of measuring the chip's local stress gradient and complete readout circuitry supporting data transfer via I2C protocol. The sensor takes 10.2 ms to measure through all four structures and goes into a low-power mode when not in use. The designed chip consumes a total current of \u0000<inline-formula><tex-math>$sim$</tex-math></inline-formula>\u0000300 \u0000<inline-formula><tex-math>$boldsymbol{mu}$</tex-math></inline-formula>\u0000A for one complete operation cycle and \u0000<inline-formula><tex-math>$sim$</tex-math></inline-formula>\u000030 \u0000<inline-formula><tex-math>$boldsymbol{mu}$</tex-math></inline-formula>\u0000A during low power mode in simulations. Moreover, the complete design is CMOS-based, making it easier for large-scale commercial fabrication and more affordable for patients in the long run. This paper further proposes the concept of a tactile smart skin by integrating a network of sensor chips with flexible polymers.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 4","pages":"834-848"},"PeriodicalIF":0.0,"publicationDate":"2024-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10575922","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141473910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Microfluidic Lab-on-CMOS Packaging Using Wafer-Level Molding and 3D-Printed Interconnects","authors":"Jacob Dawes;Tzu-Hsuan Chou;Boyu Shen;Matthew L. Johnston","doi":"10.1109/TBCAS.2024.3419804","DOIUrl":"10.1109/TBCAS.2024.3419804","url":null,"abstract":"Lab-on-a-chip (LoC) technologies continue to promise lower cost and more accessible platforms for performing biomedical testing in low-cost and disposable form factors. Lab-on-CMOS or lab-on-microchip methods extend this paradigm by merging passive LoC systems with active complementary metal-oxide semiconductor (CMOS) integrated circuits (IC) to enable front-end signal conditioning and digitization immediately next to sensors in fluid channels. However, integrating ICs with microfluidics remains a challenge due to size mismatch and geometric constraints, such as non-planar wirebonds or flip-chip approaches in conflict with planar microfluidics. In this work, we present a hybrid packaging solution for IC-enabled microfluidic sensor systems. Our approach uses a combination of wafer-level molding and direct-write 3D printed interconnects, which are compatible with post-fabrication of planar dielectric and microfluidic layers. In addition, high-resolution direct-write printing can be used to rapidly fabricate electrical interconnects at a scale compatible with IC packaging without the need for fixed tooling. Two demonstration sensor-in-package systems with integrated microfluidics are shown, including measurement of electrical impedance and optical scattering to detect and size particles flowing through microfluidic channels over or adjacent to CMOS sensor and read-out ICs. The approach enables fabrication of impedance measurement electrodes less than 1 mm from the readout IC, directly on package surface. As shown, direct fluid contact with the IC surface is prevented by passivation, but long-term this approach can also enable fluid access to IC-integrated electrodes or other top-level IC features, making it broadly enabling for lab-on-CMOS applications.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"18 4","pages":"821-833"},"PeriodicalIF":0.0,"publicationDate":"2024-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141532486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Towards Hardware Supported Domain Generalization in DNN-Based Edge Computing Devices for Health Monitoring","authors":"Johnson Loh;Lyubov Dudchenko;Justus Viga;Tobias Gemmeke","doi":"10.1109/TBCAS.2024.3418085","DOIUrl":"10.1109/TBCAS.2024.3418085","url":null,"abstract":"Deep neural network (DNN) models have shown remarkable success in many real-world scenarios, such as object detection and classification. Unfortunately, these models are not yet widely adopted in health monitoring due to exceptionally high requirements for model robustness and deployment in highly resource-constrained devices. In particular, the acquisition of biosignals, such as electrocardiogram (ECG), is subject to large variations between training and deployment, necessitating domain generalization (DG) for robust classification quality across sensors and patients. The continuous monitoring of ECG also requires the execution of DNN models in convenient wearable devices, which is achieved by specialized ECG accelerators with small form factor and ultra-low power consumption. However, combining DG capabilities with ECG accelerators remains a challenge. This article provides a comprehensive overview of ECG accelerators and DG methods and discusses the implication of the combination of both domains, such that multi-domain ECG monitoring is enabled with emerging algorithm-hardware co-optimized systems. Within this context, an approach based on correction layers is proposed to deploy DG capabilities on the edge. Here, the DNN fine-tuning for unknown domains is limited to a single layer, while the remaining DNN model remains unmodified. Thus, computational complexity (CC) for DG is reduced with minimal memory overhead compared to conventional fine-tuning of the whole DNN model. The DNN model-dependent CC is reduced by more than 2.5 <inline-formula><tex-math>$times$</tex-math></inline-formula> compared to DNN fine-tuning at an average increase of F1 score by more than 20 % on the generalized target domain. In summary, this article provides a novel perspective on robust DNN classification on the edge for health monitoring applications.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"19 1","pages":"5-15"},"PeriodicalIF":0.0,"publicationDate":"2024-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141447877","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A 382nVrms 100GΩ@50Hz Active Electrode for Dry-Electrode EEG Recording.","authors":"Guanghua Qian, Yanxing Suo, Qiao Cai, Yong Lian, Yang Zhao","doi":"10.1109/TBCAS.2024.3417716","DOIUrl":"10.1109/TBCAS.2024.3417716","url":null,"abstract":"<p><p>This article describes a low noise and ultra-high input impedance active electrode (AE) interface chip for dry-electrode EEG recording. To compensate the input parasitic capacitance and the ESD leakage, power/ground/ESD bootstrapping is proposed. This design integrates chopping stabilization technique to suppress flicker noise of the amplifier which has never been tackled in previous bootstrapped AE design. Both on-chip and off-chip input routing is active shielded to minimize wire parasitic. Fabricated in a 0.18μm CMOS process, the AE core occupies about 0.056mm2 and draws 17.95μA from a 1.8V supply. The proposed AE achieves 100GΩ input impedance at 50Hz and over 1GΩ at 1kHz with a low input-referred noise of 382nVrms integrated from 0.5Hz to 70Hz. This design is the first 100GΩ@50Hz input impedance chopper stabilized AE compared to the state-of-the-art. Dry-electrode EEG recording capability of the proposed AE are verified on three types of experiments including spontaneous α-wave, event related potential and steady-state visual evoked potential.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141437948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}