IEEE transactions on biomedical circuits and systems最新文献

Guest Editorial: Selected Papers from the 2024 IEEE International Symposium on Circuits and Systems

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-02 DOI: 10.1109/TBCAS.2025.3551784

Hanjun Jiang;Ulkuhan Guler;S. Abdollah Mirbozorgi;Sahil Shah

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IEEE Circuits and Systems Society Information

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-02 DOI: 10.1109/TBCAS.2025.3551796

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A 9.68 nW 57.51dB SNDR SAR ADC with Dual Bypass Windows Based on Non-binary Split Capacitors for Biomedical Applications.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-02 DOI: 10.1109/TBCAS.2025.3557241

Kangkang Sun, Jingjing Liu, Feng Yan, Haoning Sun, Yafei Zhang, Yuan Ren, Linfei Huang, Yao Pi, Wanqing Wu, Jian Guan

{"title":"A 9.68 nW 57.51dB SNDR SAR ADC with Dual Bypass Windows Based on Non-binary Split Capacitors for Biomedical Applications.","authors":"Kangkang Sun, Jingjing Liu, Feng Yan, Haoning Sun, Yafei Zhang, Yuan Ren, Linfei Huang, Yao Pi, Wanqing Wu, Jian Guan","doi":"10.1109/TBCAS.2025.3557241","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3557241","url":null,"abstract":"The paper proposes a low-power Successive Approximation Register (SAR) Analog-to-Digital Conversion (ADC) with dual bypass windows based on non-binary split capacitors. To reduce the power consumption, the bypass windows constituted by the split capacitors can maximize the coverage of biological signals both in the resting state and excited state. When the signal falls within the designated window, unnecessary conversion cycles are skipped. This process is mainly judged and controlled by digital circuits, which is highly robust and does not require calibration. Meanwhile, a low-power dynamic CMOS comparator is proposed, which can effectively reduce the voltage variation of the latch node during the comparator's operation, further reducing power consumption. The proposed SAR ADC, based on a 180nm process, measures a power consumption of 9.68nW at a supply voltage of 0.6V and a sampling rate of 5.21kS/s. The signal-to-noise-and-distortion ratio (SNDR) and the spur-free dynamic range (SFDR) are measured at 57.51dB and 71.68dB, respectively. It also achieves an effective number of bits (ENOB) of 9.26 bits and a Walden figure-of-merit (FoM) of 2.9 fJ/conv.-step. The proposed SAR ADC is also verified by collected electromyogram (EMG), electrocardiogram (ECG), and electroencephalogram (EEG) signals. The average power consumption for quantifying EMG signals is 7.95 nW, providing an attractive solution for low-power SAR ADCs in biomedical applications.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143775208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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IEEE Transactions on Biomedical Circuits and Systems Publication Information

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-02 DOI: 10.1109/TBCAS.2025.3551714

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A 44μW Two-Electrode ECG Acquisition ASIC with Hybrid Motion Artifact Removal and Power-Efficient R-Peak Detection.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-03-28 DOI: 10.1109/TBCAS.2025.3556256

Tianxiang Qu, Xuecheng Yang, Biao Tang, Xiao Li, Min Chen, Zhiliang Hong, Xiaoyang Zeng, Jiawei Xu

{"title":"A 44μW Two-Electrode ECG Acquisition ASIC with Hybrid Motion Artifact Removal and Power-Efficient R-Peak Detection.","authors":"Tianxiang Qu, Xuecheng Yang, Biao Tang, Xiao Li, Min Chen, Zhiliang Hong, Xiaoyang Zeng, Jiawei Xu","doi":"10.1109/TBCAS.2025.3556256","DOIUrl":"10.1109/TBCAS.2025.3556256","url":null,"abstract":"Motion artifacts (MA), common-mode interference (CMI), and varying electrode-tissue impedance (ETI) are the main factors that cause heart rate detection errors in practical wearable ECG acquisition. These problems are further exacerbated in two-electrode based ECG systems. This article presents an ambulatory ECG acquisition ASIC with fully integrated, low power motion artifacts removal (MAR) and heart rate detection, specifically for two-electrode ECG measurement. To alleviate the significant CMI due to the absence of subject bias electrode, this work utilizes an improved common-mode cancellation scheme to suppress CMI up to 40Vpp with dynamic power consumption. To address excessive MA caused by the body movement, a hybrid MAR technique is proposed, where both ETI and DC electrode offset (DEO) signals are incorporated as inputs to the adaptive filter. This approach not only prevents channel saturation in a power-efficient manner, but also accurately extracts MA and suppresses it in real time, thereby ensuring stable ECG outputs and accurate, power-efficient R-peak detection even in the presence of body movements. Fabricated in a standard 180nm CMOS process, the core IA achieves an input referred noise (IRN) of 0.62μVrms (1-150Hz), an input impedance of 1.9GΩ and a total-CMRR (T-CMRR) of 92dB at 50Hz. In a two-electrode configuration, the ASIC successfully suppresses the MA and obtains a high-quality ECG with well-identified QRS complex, enabling the built-in R-peak detection algorithm to calculate real-time heart rate more accurately and efficiently.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143735689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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A 28nm Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-03-27 DOI: 10.1109/TBCAS.2025.3555579

Yi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang

{"title":"A 28nm Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing.","authors":"Yi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Wen-Ching Chen, Liang-Yi Lin, Nian-Shyang Chang, Chun-Pin Lin, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang","doi":"10.1109/TBCAS.2025.3555579","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3555579","url":null,"abstract":"This paper presents the first end-to-end next-generation sequencing (NGS) data analysis accelerator for short-read mapping, haplotype calling, variant calling, and genotyping. It supports both single-end and paired-end short-reads (or reads) and uses the FM-index, a compact index data structure, for exact-match in short-read mapping. For inexact match part of short-read mapping, a dynamic programming array is proposed to determine the mapping results. To reduce the workload of short-read mapping, a rapid similarity calculation is designed. A rescue technique is also adopted to increase the overall sensitivity. In haplotype calling, a parallel k-mer processing engine can construct the de Bruijn graph and assemble the haplotypes. The variant calling step determines variants between a subject and a reference genome sequence with a variant discovery engine. Lastly, genotype likelihood is computed in parallel by a genotype likelihood computing engine, which outputs genotypes of all discovered variants and corresponding Phred-scaled likelihood (PL) values. This work completes end-to-end data analysis for the 50× PrecisionFDA dataset in an average of 28.2 minutes. It achieves a 3-to-59× higher throughput than the existing solutions with higher precision (99.79%) and sensitivity (99.03%). The chip also achieves a 935× higher energy efficiency than the Illumina DRAGEN FPGA acceleration system.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143733734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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IEEE Circuits and Systems Society Information

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-11 DOI: 10.1109/TBCAS.2025.3538049

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Guest Editorial: Ultralow-Power Technologies for Edge Computing in Human-Machine Interface Applications

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-11 DOI: 10.1109/TBCAS.2025.3533805

Elisa Donati;Bo Zhao;Simone Benatti;Andrea Cossettini

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IEEE Transactions on Biomedical Circuits and Systems Publication Information

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-11 DOI: 10.1109/TBCAS.2025.3538047

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Erratum to “Design of an Extreme Low Cutoff Frequency Highpass Frontend for CMOS ISFET via Direct Tunneling Principle”

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-11 DOI: 10.1109/TBCAS.2024.3411913

Jing Liang;Yuanqi Hu

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