IEEE transactions on biomedical circuits and systems最新文献

IEEE Circuits and Systems Society Information

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-11 DOI: 10.1109/TBCAS.2025.3538049

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Guest Editorial: Ultralow-Power Technologies for Edge Computing in Human-Machine Interface Applications

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-11 DOI: 10.1109/TBCAS.2025.3533805

Elisa Donati;Bo Zhao;Simone Benatti;Andrea Cossettini

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IEEE Transactions on Biomedical Circuits and Systems Publication Information

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-11 DOI: 10.1109/TBCAS.2025.3538047

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Erratum to “Design of an Extreme Low Cutoff Frequency Highpass Frontend for CMOS ISFET via Direct Tunneling Principle”

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-11 DOI: 10.1109/TBCAS.2024.3411913

Jing Liang;Yuanqi Hu

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Real-Time Imaging Enhancement of Handheld Photoacoustic System With FeRAM Crossbar Array based Neuromorphic Design.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-02-04 DOI: 10.1109/TBCAS.2025.3538578

Zhengyuan Zhang, Tiancheng Cao, Siyu Liu, Haoran Jin, Wensong Wang, Xiangjun Yin, Chen Liu, Goh Wang Ling, Yuan Gao, Yuanjin Zheng

{"title":"Real-Time Imaging Enhancement of Handheld Photoacoustic System With FeRAM Crossbar Array based Neuromorphic Design.","authors":"Zhengyuan Zhang, Tiancheng Cao, Siyu Liu, Haoran Jin, Wensong Wang, Xiangjun Yin, Chen Liu, Goh Wang Ling, Yuan Gao, Yuanjin Zheng","doi":"10.1109/TBCAS.2025.3538578","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3538578","url":null,"abstract":"The miniaturization and real time imaging capability have always been the desired properties of photoacoustic imaging (PAI) system, which unlocked vast potential for personalized healthcare and diagnostics. While the imaging quality and resolution in such systems are inferior due to physics and system volume constraints, which limited its wide deployment and application. This paper proposes a novel platform to enhance the imaging quality of handheld PAI system in real time, integrating MultiResU-Net imaging enhancement algorithm with Ferroelectric random-access memory (FeRAM) crossbar array. The FeRAM crossbar array enables in memory computing, which is highly suitable for accelerating deep neural network where extensive matrix multiplications are involved. The hardware implementation of the algorithm is optimized for low-power operation on edge devices, a specifically designed algorithmic strategy is further introduced to accurately simulate the impact of hardware variation on the computation in the array with time complexity of O(mn). The feasibility and effectiveness of this method are demonstrated through simulation data (synthesized through physical model) and in vivo data, the experimental results demonstrate more than 10 times of imaging resolution improvement. The execution of neural network inference has been significantly accelerated and can be completed within a few microseconds, fully covering the imaging speed in handheld PAI system and satisfying the real time imaging capability. The whole platform can be integrated into a compact size of 25×25×20 cm3, which is a portable system with real time and high resolution imaging capability.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-02-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143545248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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An Active Microchannel Neural Interface for Implantable Electrical Stimulation and Recording.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-01-27 DOI: 10.1109/TBCAS.2025.3533612

Maryam Habibollahi, Dai Jiang, Henry Thomas Lancashire, Andreas Demosthenous

{"title":"An Active Microchannel Neural Interface for Implantable Electrical Stimulation and Recording.","authors":"Maryam Habibollahi, Dai Jiang, Henry Thomas Lancashire, Andreas Demosthenous","doi":"10.1109/TBCAS.2025.3533612","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3533612","url":null,"abstract":"A mm-sized, implantable neural interface for bidirectional control of the peripheral nerves with microchannel electrodes is presented in this paper. The application-specific integrated circuit (ASIC) developed in a 0.18 μm CMOS technology is designed to achieve highly selective, concurrent control of 300-μm-wide groups of small nerve sections. It has in-situ, high-voltage-compliant (45 V) electrical stimulation and low-voltage (1.8 V) neural recording in each channel. Biphasic stimulus current pulses up to 124 μA with a 2 μA resolution are generated between 7.4 Hz and 20 kHz frequencies to stimulate and block neural activity. Action potentials are measured across a 10 kHz bandwidth with a variable gain response that ranges up to 72 dB. The neural recording front-end implements a low-power and low-noise biopotential amplifier with an input-referred noise (IRN) of 2.74 μVrms across the full measurement bandwidth. Automatic detection and reduction of stimulus artifacts is realised using a pole-shifting mechanism with a 1-ms amplifier recovery time. Versatile control of concurrently-operating channels is achieved in a two-channel, 2.31 mm2 interface ASIC using local control that allows up to seven devices to operate in parallel. Invitro validation of the active interface shows feasibility for closed-loop peripheral nerve control, while ex-vivo analyses of concurrent stimulation and recording demonstrates the measured neural response to electrical stimuli.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-01-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143545027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Compact Low-Power Interfacing and Data Reduction for Floating Active Intracortical Neural Probes with Modular Architecture.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-01-22 DOI: 10.1109/TBCAS.2025.3532465

Roman Willaredt, Christoph Grandauer, Daniel De Dorigo, Daniel Wendler, Matthias Kuhl, Yiannos Manoli

{"title":"Compact Low-Power Interfacing and Data Reduction for Floating Active Intracortical Neural Probes with Modular Architecture.","authors":"Roman Willaredt, Christoph Grandauer, Daniel De Dorigo, Daniel Wendler, Matthias Kuhl, Yiannos Manoli","doi":"10.1109/TBCAS.2025.3532465","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3532465","url":null,"abstract":"Host connectivity for invasive, high-density neural probes that integrate all the circuits needed for insitu digitization of brain activity in the shank requires a thin and conformal cable. To minimize tissue damage during insertion or from micro-movements during chronic use, the wiring must be constrained in size with a low number of interconnects. Reducing the number of traces results in thinner and more flexible cables and allows the data rate to be increased by using wider traces. Fewer contacts are also less susceptible to reliability issues in long-term applications. This paper presents a modular digital neural probe that embeds a two-wire bidirectional interface for host connectivity minimizing the data overhead for configuration and readout. The presented handshaking allows synchronization of multiple shanks and is designed to adapt to varying line delays caused by different cable lengths or changing environmental conditions. Data reduction based on delta encoding further increases the number of electrodes that can be read out simultaneously. The system is validated in a 192-channel neural probe fabricated in a 180nm CMOS technology with a supply voltage of 1.2 V.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-01-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143545114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Efficient Inductive Link Design: A Systematic Method for Optimum Biomedical Wireless Power Transfer in Area-Constrained Implants.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-01-21 DOI: 10.1109/TBCAS.2025.3531995

Asif Iftekhar Omi, Anyu Jiang, Baibhab Chatterjee

{"title":"Efficient Inductive Link Design: A Systematic Method for Optimum Biomedical Wireless Power Transfer in Area-Constrained Implants.","authors":"Asif Iftekhar Omi, Anyu Jiang, Baibhab Chatterjee","doi":"10.1109/TBCAS.2025.3531995","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3531995","url":null,"abstract":"In the context of implantable bioelectronics, this work provides new insights into maximizing biomedical wireless power transfer (BWPT) via the systematic development of inductive links. This approach addresses the specific challenges of power transfer efficiency (PTE) optimization within the spatial/area constraints of bio-implants embedded in tissue. Key contributions include the derivation of an optimal self-inductance with S-parameter-based analyses leading to the codesign of planar spiral coils and L-section impedance matching networks. To validate the proposed design methodology, two coil prototypes- one symmetric (type-1) and one asymmetric (type- 2)- were fabricated and tested for PTE in pork tissue. Targeting a 20 MHz design frequency, the type-1 coil demonstrated a state-of-the-art PTE of ~ 4% (channel length = 15 mm) with a return loss (RL) > 20 dB on both the input and output sides, within an area constraint of < 18×18 mm2. In contrast, the type-2 coil achieved a PTE of ~ 2% with an RL > 15 dB, for a smaller receiving coil area of < 5×5 mm2 for the same tissue environment. To complement the coils, we demonstrate a 65 nm test chip with an integrated energy harvester, which includes a 30-stage rectifier and low-dropout regulator (LDO), producing a stable ~ 1V DC output within tissue medium, matching theoretical predictions and simulations. Furthermore, we provide a robust and comprehensive guideline for advancing efficient inductive links for various BWPT applications, with shared resources in GitHub available for utilization by the broader community.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143545232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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An Energy-Efficient Configurable 1-D CNN-Based Multi-Lead ECG Classification Coprocessor for Wearable Cardiac Monitoring Devices.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-01-17 DOI: 10.1109/TBCAS.2025.3530790

Chen Zhang, Zhijie Huang, Changchun Zhou, Ao Qie, Xin'an Wang

{"title":"An Energy-Efficient Configurable 1-D CNN-Based Multi-Lead ECG Classification Coprocessor for Wearable Cardiac Monitoring Devices.","authors":"Chen Zhang, Zhijie Huang, Changchun Zhou, Ao Qie, Xin'an Wang","doi":"10.1109/TBCAS.2025.3530790","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3530790","url":null,"abstract":"Many electrocardiogram (ECG) processors have been widely used for cardiac monitoring. However, most of them have relatively low energy efficiency, and lack configurability in classification leads number and inference algorithm models. A multi-lead ECG coprocessor is proposed in this paper, which can perform efficient ECG anomaly detection. In order to achieve high sensitivity and positive precision of R-peak detection, a method based on zero-crossing slope adaptive threshold comparison is proposed. Also, a one-dimensional convolutional neural network (1-D CNN) based classification engine with reconfigurable processing elements (PEs) is designed, good energy efficiency is achieved by combining filter level parallelism and output channel parallelism within the PE chains with register level data reuse strategy. To improve configurability, a single instruction multiple data (SIMD) based central controller is adopted, which facilitates ECG classification with configurable number of leads and updatable inference models. The proposed ECG coprocessor is fabricated using 55 nm CMOS technology, supporting classification with an accuracy of over 98%. The test results indicate that the chip consumes 62.2 nJ at 100 MHz, which is lower than most recent works. The energy efficiency reaches 397.1 GOPS/W, achieving an improvement of over 40% compared to the reported ECG processors using CNN models. The comparison results show that this design has advantages in energy overhead and configurability.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-01-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143545036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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An Ultra-low-power Amplifier-less Potentiostat Design Based on Digital Regulation Loop.

IEEE transactions on biomedical circuits and systems Pub Date : 2025-01-09 DOI: 10.1109/TBCAS.2025.3527652

Muhammad Abrar Akram, Aida Aberra, Soon-Jae Kweon, Sohmyung Ha

{"title":"An Ultra-low-power Amplifier-less Potentiostat Design Based on Digital Regulation Loop.","authors":"Muhammad Abrar Akram, Aida Aberra, Soon-Jae Kweon, Sohmyung Ha","doi":"10.1109/TBCAS.2025.3527652","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3527652","url":null,"abstract":"This paper presents a new potentiostat circuit architecture for interfaces with amperometric electrochemical biosensors. The proposed architecture, which is based on a digital low-dropout regulator (DLDO) structure, successfully eliminates the need for transimpedance amplifier (TIA), control amplifier, and other passive elements unlike other typical potentiostat topologies. It can regulate the required electrode voltages and measure the sensor currents (ISENSE) at the same time by using a simple implementation with clocked comparators, digital loop filters, and current-steering DACs. Three different configurations of the proposed potentiostat are discussed including single-side regulated (SSR) potentiostat, dual-side regulated (DSR) potentiostat, and differential sensing DSR potentiostat with a background working electrode. These proposed potentiostats were designed and fabricated in a 180 nm CMOS process, occupying an active silicon areas of 0.0645 mm2, 0.1653 mm2, and 0.266 mm2, respectively. Validation results demonstrate that the proposed potentiostats operate on a wide sampling frequency range from 100 Hz to 100 MHz and supply voltage range from 1 V to 1.8 V. The proposed DSR potentiostat achieves a minimal power consumption of 3.7 nW over the entire dynamic range of 129.5 dB.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143545042","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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