{"title":"一种新的快速模板减法刺激伪影抑制系统。","authors":"Yirui Liu, Quanbei Chang, Xuhui Li, Xiao Liu","doi":"10.1109/TBCAS.2025.3591110","DOIUrl":null,"url":null,"abstract":"<p><p>The presence of large stimulus artifact (SA) makes it difficult to perform concurrent stimulation and recording in retinal prostheses. This paper presents a novel template-based system for suppressing SA visible at the stimulation/recording electrodes. The template of SA has been derived by working out the full Randles impedance model whose expression in the frequency domain serves as the transfer function from the stimulus current to SA. A prototype ASIC has been fabricated in a 180-nm CMOS process and validated in saline. The template calculation framework utilizes a pipeline digital processing which achieves rapid template generation within 26.35 ms (25.6 ms for acquiring the SA waveform and 0.75 ms for computation) after the detection of the first stimulation cycle. The real-time SA suppression is 20.2 dB and can be boosted to 44.3 dB with offline signal processing. The ASIC's core occupies 0.43 mm<sup>2</sup>. It consumes 8.27 μW and 30.83 μW in the normal amplification mode and SA suppression mode, respectively.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2025-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Novel Stimulus Artifact Suppression System with Fast Template Subtraction.\",\"authors\":\"Yirui Liu, Quanbei Chang, Xuhui Li, Xiao Liu\",\"doi\":\"10.1109/TBCAS.2025.3591110\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p><p>The presence of large stimulus artifact (SA) makes it difficult to perform concurrent stimulation and recording in retinal prostheses. This paper presents a novel template-based system for suppressing SA visible at the stimulation/recording electrodes. The template of SA has been derived by working out the full Randles impedance model whose expression in the frequency domain serves as the transfer function from the stimulus current to SA. A prototype ASIC has been fabricated in a 180-nm CMOS process and validated in saline. The template calculation framework utilizes a pipeline digital processing which achieves rapid template generation within 26.35 ms (25.6 ms for acquiring the SA waveform and 0.75 ms for computation) after the detection of the first stimulation cycle. The real-time SA suppression is 20.2 dB and can be boosted to 44.3 dB with offline signal processing. The ASIC's core occupies 0.43 mm<sup>2</sup>. It consumes 8.27 μW and 30.83 μW in the normal amplification mode and SA suppression mode, respectively.</p>\",\"PeriodicalId\":94031,\"journal\":{\"name\":\"IEEE transactions on biomedical circuits and systems\",\"volume\":\"PP \",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2025-07-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE transactions on biomedical circuits and systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TBCAS.2025.3591110\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE transactions on biomedical circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TBCAS.2025.3591110","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Novel Stimulus Artifact Suppression System with Fast Template Subtraction.
The presence of large stimulus artifact (SA) makes it difficult to perform concurrent stimulation and recording in retinal prostheses. This paper presents a novel template-based system for suppressing SA visible at the stimulation/recording electrodes. The template of SA has been derived by working out the full Randles impedance model whose expression in the frequency domain serves as the transfer function from the stimulus current to SA. A prototype ASIC has been fabricated in a 180-nm CMOS process and validated in saline. The template calculation framework utilizes a pipeline digital processing which achieves rapid template generation within 26.35 ms (25.6 ms for acquiring the SA waveform and 0.75 ms for computation) after the detection of the first stimulation cycle. The real-time SA suppression is 20.2 dB and can be boosted to 44.3 dB with offline signal processing. The ASIC's core occupies 0.43 mm2. It consumes 8.27 μW and 30.83 μW in the normal amplification mode and SA suppression mode, respectively.
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