IEEE transactions on biomedical circuits and systems最新文献_第2页

From Wearables to Implantables: Harnessing sensor technologies for continuous health monitoring. 从可穿戴设备到植入式设备：利用传感器技术进行持续健康监测。

IEEE transactions on biomedical circuits and systems Pub Date : 2025-05-09 DOI: 10.1109/TBCAS.2025.3568754

Asish Koruprolu, Tyler Hack, Omid Ghadami, Aditi Jain, Drew A Hall

引用次数: 0

Artifact-Tolerant Electrophysiological Sensor Interface with 3.6V/1.8V DM/CM Input Range and 52.3mV_pp/μs Recovery Using Asynchronous Signal Folding. 具有3.6V/1.8V DM/CM输入范围和52.3mVpp/μs异步信号折叠恢复的伪影容电生理传感器接口。

IEEE transactions on biomedical circuits and systems Pub Date : 2025-05-06 DOI: 10.1109/TBCAS.2025.3567524

Qiao Cai, Xinzi Xu, Yanxing Suo, Guanghua Qian, Yongfu Li, Guoxing Wang, Yong Lian, Yang Zhao

{"title":"Artifact-Tolerant Electrophysiological Sensor Interface with 3.6V/1.8V DM/CM Input Range and 52.3mVpp/μs Recovery Using Asynchronous Signal Folding.","authors":"Qiao Cai, Xinzi Xu, Yanxing Suo, Guanghua Qian, Yongfu Li, Guoxing Wang, Yong Lian, Yang Zhao","doi":"10.1109/TBCAS.2025.3567524","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3567524","url":null,"abstract":"In the practical implementations of wearable sensors, motion artifacts with large amplitudes often cause signal chain saturation, significantly degrading biopotential signal integrity. Similarly, rapid stimulation artifacts are inevitable during closed-loop brain stimulation therapy, posing additional challenges for real-time signal acquisition. To address motion and stimulation artifacts with amplitudes reaching hundreds of mV while minimizing information loss, a sensor interface with high input range and fast artifacts recovery capability is essential. This paper presents a continuous-time track-and-zoom (CT-TAZ) technique designed to handle large artifacts events without saturation. The proposed system achieves a 3.6V/1.8V differential-mode/common-mode full-scale input range. Fabricated in a 180nm CMOS process, the prototype chip occupies an area of 0.694mm2 and consumes 12/32.6/51.6μW for recordings without/with single-end/ with differential rail-to-rail artifacts. The system demonstrates an average artifacts recovery time of 65.3 μs under 3.6V stimulation artifacts, achieving an average artifacts recovery speed of 52.3mVpp/μs, which is 2.25× larger input range and 3× faster recovery compared to the state-of-the-art.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143995414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Stochastic Signal Processing Based Stimulation Artifact Cancellation in ΔΣ Neural Frontend. 基于随机信号处理的ΔΣ神经前端刺激伪影消除。

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-22 DOI: 10.1109/TBCAS.2025.3563684

Gayas Mohiuddin Sayed, Armin Bartels, Daniel De Dorigo, Tim Fleiner, Nicole Rosskothen-Kuhl, Matthias Kuhl

{"title":"Stochastic Signal Processing Based Stimulation Artifact Cancellation in ΔΣ Neural Frontend.","authors":"Gayas Mohiuddin Sayed, Armin Bartels, Daniel De Dorigo, Tim Fleiner, Nicole Rosskothen-Kuhl, Matthias Kuhl","doi":"10.1109/TBCAS.2025.3563684","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3563684","url":null,"abstract":"This paper presents a neural recorder frontend featuring electrical stimulation artifact cancellation by employing an adaptive LMS filter in the stochastic domain. The recording system comprises of a low-noise analog frontend and a 1st-order ΔΣ modulator. A power-efficient stochastic signal processor, occupying an area of 0.12 mm2, processes the ΔΣ modulator output bitstream to learn and compensate for artifacts induced by concurrent electrical stimulation. The proposed approach, validated on a prototype ASIC fabricated in 180 nm CMOS technology, has a total power consumption of 6.83 μW, with the stochastic signal processor consuming only 0.51 μW. Experimental results demonstrate that the system effectively suppresses peak-to-peak stimulation artifacts of 200 mV by approximately 33 dB over a 10 kHz bandwidth, establishing it as a novel state-of-the-art real-time artifact cancellation system. Furthermore, in-vitro validation for both biphasic and monophasic stimulation confirms its efficacy, with 74.3 mVpp artifacts from biphasic stimulation being attenuated by 25 dB.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-04-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144056116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 101-dB DR 2.2GΩ-Input-Impedance Direct Digitization ExG Front-End With Δ-Modulation. 101-dB DR 2.2GΩ-Input-Impedance直接数字化ExG前端与Δ-Modulation。

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-21 DOI: 10.1109/TBCAS.2025.3563304

Yuying Li, Hao Li, Tianxiang Qu, Qi Liu, Zhiliang Hong, Jiawei Xu

{"title":"A 101-dB DR 2.2GΩ-Input-Impedance Direct Digitization ExG Front-End With Δ-Modulation.","authors":"Yuying Li, Hao Li, Tianxiang Qu, Qi Liu, Zhiliang Hong, Jiawei Xu","doi":"10.1109/TBCAS.2025.3563304","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3563304","url":null,"abstract":"Long-term, continuous health monitoring imposes stringent demands on bio-recording analog front-end (AFE) circuits, specifically in terms of dynamic range (DR), noise, input impedance, and power consumption. This work introduces a DR-enhanced direct-digitization AFE based on a Δ-modulated transconductor (TC) stage, followed by a second-order ΔΣ ADC. In this architecture, the accumulated DAC is subtracted exclusively at the TC input stage, allowing the integrators to process only the low-amplitude Δ-modulated signal and thus relaxing the dynamic range constraints of conventional Gm-C ΔΣ ADCs. The TC input stage achieves high input impedance and high linearity through a current-balancing transconductor and a flipped-voltage-follower (FVF) loop. Fabricated with a standard 180nm CMOS process, the proposed Δ-ΔΣ AFE exhibits an SNDR of 91 dB, a dynamic range of 101 dB, input referred noise of 58 nV/√Hz, and a power consumption of 63 μW. These results correspond to a FoMSNDR of 160.1 dB and a FoMDR of 170 dB. The AFE prototype has been validated through scalp EEG, leg EMG, and chest ECG with significant body movements, demonstrating its effectiveness as a motion-artifact-tolerant direct-ADC front end.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-04-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144052464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 6.4GΩ-Input-Impedance 104.5dB-CMRR 96dB-DR DD-AFE with Tri-Level IDAC for Small-Diameter Dry-Electrode Interface. 6.4GΩ-Input-Impedance 104.5dB-CMRR 96dB-DR DD-AFE三电平IDAC用于小直径干电极接口。

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-04 DOI: 10.1109/TBCAS.2025.3558094

Yijie Li, Yuxiang Tang, Jianhong Zhou, Tianxiang Qu, Zhiliang Hong, Jiawei Xu

{"title":"A 6.4GΩ-Input-Impedance 104.5dB-CMRR 96dB-DR DD-AFE with Tri-Level IDAC for Small-Diameter Dry-Electrode Interface.","authors":"Yijie Li, Yuxiang Tang, Jianhong Zhou, Tianxiang Qu, Zhiliang Hong, Jiawei Xu","doi":"10.1109/TBCAS.2025.3558094","DOIUrl":"10.1109/TBCAS.2025.3558094","url":null,"abstract":"This article presents a direct-digitization analog front end (DD-AFE) with enhanced input-impedance, common-mode rejection ratio (CMRR), and dynamic range (DR) for wearable biopotential (ExG) signal acquisition, especially for small-diameter dry electrodes. The DD-AFE employs a second-order continuous-time delta-sigma modulator (CT-ΔSM) and multiple circuit techniques to support direct-digitization readouts. These include 1) A high input-impedance input feedforward (FF), embedded in a 4-input 4-bit successive approximation register (SAR) quantizer. This allows two integrators to adopt a compact and energy-efficient Gm-C structure, and improves stability and linearity, resulting in a 6.6dB increase in DR, 42dB increase in SQNR at peak input and a unity-gain signal transfer function (STF) with a gain flatness of 0.04%. 2) A fixed-voltage dead-band assisted tri-level current-steering DAC (IDAC). It not only increases the DR and CMRR of the DD-AFE but also eliminates the harmonic distortion induced by tri-level dynamic element matching (DEM). 3) A high-gain two-stage Gm-boosting inverter-based OTA with embedded low-frequency chopping. The former largely improves linearity and CMRR, while the latter mitigates 1/f noise without compromising the input impedance. Fabricated in a 0.18-μm CMOS process, this DD-AFE achieves 6.4GΩ input impedance and 104.5dB CMRR at 50Hz, as well as 90.4dB peak SNDR, 96dB DR, and up to 425mVPP linear input range.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143784659","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 9.68 nW 57.51dB SNDR SAR ADC with Dual Bypass Windows Based on Non-binary Split Capacitors for Biomedical Applications. 基于非二进制分割电容的双旁路窗口的9.68 nW 57.51dB SNDR SAR ADC。

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-02 DOI: 10.1109/TBCAS.2025.3557241

Kangkang Sun, Jingjing Liu, Feng Yan, Haoning Sun, Yafei Zhang, Yuan Ren, Linfei Huang, Yao Pi, Wanqing Wu, Jian Guan

{"title":"A 9.68 nW 57.51dB SNDR SAR ADC with Dual Bypass Windows Based on Non-binary Split Capacitors for Biomedical Applications.","authors":"Kangkang Sun, Jingjing Liu, Feng Yan, Haoning Sun, Yafei Zhang, Yuan Ren, Linfei Huang, Yao Pi, Wanqing Wu, Jian Guan","doi":"10.1109/TBCAS.2025.3557241","DOIUrl":"https://doi.org/10.1109/TBCAS.2025.3557241","url":null,"abstract":"The paper proposes a low-power Successive Approximation Register (SAR) Analog-to-Digital Conversion (ADC) with dual bypass windows based on non-binary split capacitors. To reduce the power consumption, the bypass windows constituted by the split capacitors can maximize the coverage of biological signals both in the resting state and excited state. When the signal falls within the designated window, unnecessary conversion cycles are skipped. This process is mainly judged and controlled by digital circuits, which is highly robust and does not require calibration. Meanwhile, a low-power dynamic CMOS comparator is proposed, which can effectively reduce the voltage variation of the latch node during the comparator's operation, further reducing power consumption. The proposed SAR ADC, based on a 180nm process, measures a power consumption of 9.68nW at a supply voltage of 0.6V and a sampling rate of 5.21kS/s. The signal-to-noise-and-distortion ratio (SNDR) and the spur-free dynamic range (SFDR) are measured at 57.51dB and 71.68dB, respectively. It also achieves an effective number of bits (ENOB) of 9.26 bits and a Walden figure-of-merit (FoM) of 2.9 fJ/conv.-step. The proposed SAR ADC is also verified by collected electromyogram (EMG), electrocardiogram (ECG), and electroencephalogram (EEG) signals. The average power consumption for quantifying EMG signals is 7.95 nW, providing an attractive solution for low-power SAR ADCs in biomedical applications.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143775208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Guest Editorial: Selected Papers from the 2024 IEEE International Symposium on Circuits and Systems 嘉宾评论：2024年IEEE电路与系统国际研讨会论文选集

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-02 DOI: 10.1109/TBCAS.2025.3551784

Hanjun Jiang;Ulkuhan Guler;S. Abdollah Mirbozorgi;Sahil Shah

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IEEE Circuits and Systems Society Information IEEE电路与系统学会信息

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-02 DOI: 10.1109/TBCAS.2025.3551796

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IEEE Transactions on Biomedical Circuits and Systems Publication Information IEEE生物医学电路和系统汇刊信息

IEEE transactions on biomedical circuits and systems Pub Date : 2025-04-02 DOI: 10.1109/TBCAS.2025.3551714

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A 44μW Two-Electrode ECG Acquisition ASIC with Hybrid Motion Artifact Removal and Power-Efficient R-Peak Detection. 一种44μW混合运动伪影去除和高效r峰检测的双电极心电采集ASIC。

IEEE transactions on biomedical circuits and systems Pub Date : 2025-03-28 DOI: 10.1109/TBCAS.2025.3556256

Tianxiang Qu, Xuecheng Yang, Biao Tang, Xiao Li, Min Chen, Zhiliang Hong, Xiaoyang Zeng, Jiawei Xu

{"title":"A 44μW Two-Electrode ECG Acquisition ASIC with Hybrid Motion Artifact Removal and Power-Efficient R-Peak Detection.","authors":"Tianxiang Qu, Xuecheng Yang, Biao Tang, Xiao Li, Min Chen, Zhiliang Hong, Xiaoyang Zeng, Jiawei Xu","doi":"10.1109/TBCAS.2025.3556256","DOIUrl":"10.1109/TBCAS.2025.3556256","url":null,"abstract":"Motion artifacts (MA), common-mode interference (CMI), and varying electrode-tissue impedance (ETI) are the main factors that cause heart rate detection errors in practical wearable ECG acquisition. These problems are further exacerbated in two-electrode based ECG systems. This article presents an ambulatory ECG acquisition ASIC with fully integrated, low power motion artifacts removal (MAR) and heart rate detection, specifically for two-electrode ECG measurement. To alleviate the significant CMI due to the absence of subject bias electrode, this work utilizes an improved common-mode cancellation scheme to suppress CMI up to 40Vpp with dynamic power consumption. To address excessive MA caused by the body movement, a hybrid MAR technique is proposed, where both ETI and DC electrode offset (DEO) signals are incorporated as inputs to the adaptive filter. This approach not only prevents channel saturation in a power-efficient manner, but also accurately extracts MA and suppresses it in real time, thereby ensuring stable ECG outputs and accurate, power-efficient R-peak detection even in the presence of body movements. Fabricated in a standard 180nm CMOS process, the core IA achieves an input referred noise (IRN) of 0.62μVrms (1-150Hz), an input impedance of 1.9GΩ and a total-CMRR (T-CMRR) of 92dB at 50Hz. In a two-electrode configuration, the ASIC successfully suppresses the MA and obtains a high-quality ECG with well-identified QRS complex, enabling the built-in R-peak detection algorithm to calculate real-time heart rate more accurately and efficiently.","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2025-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143735689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0