70th Device Research Conference最新文献_第5页

Study of SiOx-based complementary resistive switching memristor 硅氧基互补电阻开关忆阻器的研究

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6256972

Yao‐Feng Chang, Yen‐Ting Chen, F. Xue, Yanzhen Wang, F. Zhou, B. Fowler, J. Lee

引用次数: 9

Quaternary nitride enhancement mode HFET with 260 mS/mm and a threshold voltage of +0.5 V 第四季氮化物增强模式HFET, 260ms /mm，阈值电压+0.5 V

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6257030

N. Ketteniss, B. Reuters, B. Hollander, H. Hahn, H. Kalisch, A. Vescan

引用次数: 5

All Spin Logic device as a compact artificial neuron 所有自旋逻辑装置作为一个紧凑的人工神经元

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6256958

A. Sarkar, B. Behin-Aein, S. Srinivasan, S. Datta

{"title":"All Spin Logic device as a compact artificial neuron","authors":"A. Sarkar, B. Behin-Aein, S. Srinivasan, S. Datta","doi":"10.1109/DRC.2012.6256958","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256958","url":null,"abstract":"In our recent work we have proposed the possibility of using magnets interacting via spin currents to implement all-spin logic (ASL) devices for information processing, fundamentally different from the standard charge-based architecture. Information is stored in the state of magnetization of the magnets and is communicated between magnets through pure spin currents. Simulations of these multi-magnet networks with our experimentally benchmarked model [2] indicate that such spin-magnet circuits can mimic many of the attributes of standard charge-based circuits such as inverters, universal NAND/NOR gates, ring oscillators etc .. However, these circuits do not take full advantage of the natural hybrid analog/digital character of spin currents and magnets, the possibility of which we discuss in this paper. Indeed, our contribution in this paper is twofold: We show that a simple model of an ASL device, maps on to the well-known 'leaky integrate and fire' equation of neuron dynamics, highlighting the analogy of the magnet to a neuron. We introduce LLGz for the first time in this paper and relate it to our full rigorous model. We also show that LLGz captures the steady state behavior of magnets predicted by the full model.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"121 1","pages":"99-100"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85352346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

NLSTT-MRAM: Robust spin transfer torque MRAM using non-local spin injection for write NLSTT-MRAM:使用非局部自旋注入进行写入的鲁棒自旋传递扭矩MRAM

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6256957

M. Sharad, G. Panagopoulos, C. Augustine, K. Roy

{"title":"NLSTT-MRAM: Robust spin transfer torque MRAM using non-local spin injection for write","authors":"M. Sharad, G. Panagopoulos, C. Augustine, K. Roy","doi":"10.1109/DRC.2012.6256957","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256957","url":null,"abstract":"In this work we propose a magnetic random access memory (MRAM) bit-cell design based on non-local spin transfer torque (NLSTT). In the proposed bit-cell, the data is written into the free layer of a magnetic tunnel junction (MTJ) using spin diffusion current (non-local spin injection), without injecting charge current into the tunneling oxide. Thus, the reliability issues, related to dielectric breakdown due to high tunneling current density (for high switching speed) are significantly mitigated. Separation of read and write current paths in the bit-cell helps in optimizing read and write separately. Hence, higher MgO thickness can be used for higher cell TMR and higher read disturb margin. Higher MTJ resistance resulting from thicker MgO also lets us use voltage mode sensing, that achieves higher speed for read operation. In the proposed bit-cell, we employ two supplementary spin injectors with tilted axis anisotropy, in order to compensate for the comparatively lower efficiency for non-local spin injection. Analysis of the proposed NLSTT-MRAM bit-cell is done using a physics based simulation framework, benchmarked with experimental data for lateral spin valve (LSV). Apart from high reliability, the proposed bit-cell achieves 110% higher tunnel magneto resistance (TMR) and 4X higher read margin for I ns switching speed as compared to standard I-transistor-I MTJ (1-T I-R) STT -MRAM of similar area.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"117 1","pages":"97-98"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85500093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Mobility and scattering mechanisms in buried InGaSb quantum well channels integrated with in-situ MBE grown gate oxide 埋置InGaSb量子阱通道与原位MBE生长栅氧化物的迁移和散射机制

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6256973

S. Madisetti, P. Nagaiah, T. Chidambaram, V. Tokranov, M. Yakimov, S. Oktyabrsky

引用次数: 0

Experimental demonstration of “Cold” low contact resistivity ohmic contacts on moderately doped n-Ge with in-situ atomic hydrogen clean 原位原子氢清洁中掺杂n-Ge的“冷”低接触电阻率欧姆接触实验证明

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6256959

A. Agrawal, Jeongwon Park, D. Mohata, K. Ahmed, S. Datta

引用次数: 0

Flicker noise characterization and analytical modeling of homo and hetero-junction III–V tunnel FETs 异质结III-V隧道场效应管的闪烁噪声特性及分析建模

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6257032

R. Bijesh, D. Mohata, H. Liu, S. Datta

引用次数: 29

High performance solution-processed thin-film transistors based on In2O3 nanocrystals 基于In2O3纳米晶体的高性能溶液加工薄膜晶体管

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6256991

S. Swisher, S. Volkman, K. Braam, Jaewon Jang, V. Subramanian

{"title":"High performance solution-processed thin-film transistors based on In2O3 nanocrystals","authors":"S. Swisher, S. Volkman, K. Braam, Jaewon Jang, V. Subramanian","doi":"10.1109/DRC.2012.6256991","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256991","url":null,"abstract":"Metal-oxide semiconductors have received a great deal of focus in recent years as a means of realizing transparent electronics for next generation display applications; such materials are expected to enable the realization of transparent pixel transistors for display that do not block light, enabling realization of brighter displays with higher aperture ratio. In recent years, the demonstration of amorphous thin films of transition metal oxides with mobility an order of magnitude greater than that of amorphous silicon has resulted in dramatic interest and rapid advances in the field. In particular, solution processable routes are considered particularly attractive since they may allow for low-cost fabrication techniques based on printing. There have been various reports of sol-gel based approaches to printable electronics based on these systems; however, an approach utilizing colloidal semiconductor nanocrystals has several distinct advantages. First, the high temperature required for crystal nucleation and growth can occur during the synthesis phase, thus decoupling the high temperature crystallization step from the processing constraints of the substrate. Second, and possibly even more importantly, using nanocrystals as the starting point for inorganic semiconducting inks may provide better control over the stoichiometry of the material, more consistent film composition, and a pathway towards controlled doping of the channel material. Here we report a synthesis of indium oxide nanocrystals, and the fabrication conditions that result in high-performance TFTs based on the same.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"38 1","pages":"241-242"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90868335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Self-aligned metal S/D GaSb p-MOSFETs using Ni-GaSb alloys 采用Ni-GaSb合金的自对准金属S/D GaSb p- mosfet

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6256931

C. Zota, S. H. Kim, Y. Asakura, M. Takenaka, S. Takagi

{"title":"Self-aligned metal S/D GaSb p-MOSFETs using Ni-GaSb alloys","authors":"C. Zota, S. H. Kim, Y. Asakura, M. Takenaka, S. Takagi","doi":"10.1109/DRC.2012.6256931","DOIUrl":"https://doi.org/10.1109/DRC.2012.6256931","url":null,"abstract":"GaSb has stirred a significant interest over the recent years, due to its high bulk electron/hole mobility and optoelectronic properties [1]. Particularly, the high hole mobility makes GaSb one of the III-V materials promising for p-MOSFETs and fully-integrated CMOS applications. However, the device technologies for GaSb MOSFETs have not been fully developed yet. In this work, we address a novel formation technology of source and drain (S/D) for GaSb p-MOSFETs. One of the problems of the S/D formation in GaSb (and generally III-V) is the low dopant solubility and the necessity of high temperature annealing for dopant activation. However, thermal stability of the GaSb/oxide interfaces is low and, therefore, a S/D formation process with low thermal budget is strongly required [2]. Also, for deeply-scaled MOSFET fabrication, self-aligned S/D formation is mandatory. For these reasons, we introduce a salicide-like self-aligned metal S/D process by using Ni into GaSb. In this study, we present the results of the characterization of Ni-GaSb alloys formed by direct reaction between Ni and GaSb, which are suitable for S/D in GaSb p-MOSFETs. Finally, we demonstrate, for the first time, a GaSb p-MOSFET with self-aligned Ni-GaSb alloy S/D, which allows us to fabricate MOSFETs at temperature as low as 250°C.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"8 1","pages":"71-72"},"PeriodicalIF":0.0,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75864972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Characterization and modeling of metal-insulator transition (MIT) based tunnel junctions 基于金属-绝缘子过渡(MIT)隧道结的表征与建模

70th Device Research Conference Pub Date : 2012-06-18 DOI: 10.1109/DRC.2012.6257012

E. Freeman, A. Kar, N. Shukla, R. Misra, R. Engel-Herbert, D. Schlom, V. Gopalan, K. Rabe, S. Datta

引用次数: 17