Quaternary nitride enhancement mode HFET with 260 mS/mm and a threshold voltage of +0.5 V

N. Ketteniss, B. Reuters, B. Hollander, H. Hahn, H. Kalisch, A. Vescan
{"title":"Quaternary nitride enhancement mode HFET with 260 mS/mm and a threshold voltage of +0.5 V","authors":"N. Ketteniss, B. Reuters, B. Hollander, H. Hahn, H. Kalisch, A. Vescan","doi":"10.1109/DRC.2012.6257030","DOIUrl":null,"url":null,"abstract":"A new approach for the heterostructure design following the idea to reduce the interface charge itself by applying a quaternary barrier layer with rather low polarization is demonstrated. The enhancement mode (e-mode) heterostructure field effect transistors (HFET) is consist of a GaN buffer and a quarternary barrier layers, whose composition and thickness are chosen carefully to result in an e-mode device. The devices is passivated with 120 nm SiN by plasma enhanced CVD. An increase in gate and drain leakage can be observed and finds its origin in surface or interface conductivity of the not fully optimized SiN. Nevertheless, for all devices the extrinsic transconductance has increased due to further carrier concentration enhancement in the access region by the passivation, and the best performance is achieved with maximum extrinsic transconductance of 260 mS/mm, which is among the highest reported for a 1 11m gate length e-mode HFET.","PeriodicalId":6808,"journal":{"name":"70th Device Research Conference","volume":"17 1","pages":"161-162"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"70th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2012.6257030","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

Abstract

A new approach for the heterostructure design following the idea to reduce the interface charge itself by applying a quaternary barrier layer with rather low polarization is demonstrated. The enhancement mode (e-mode) heterostructure field effect transistors (HFET) is consist of a GaN buffer and a quarternary barrier layers, whose composition and thickness are chosen carefully to result in an e-mode device. The devices is passivated with 120 nm SiN by plasma enhanced CVD. An increase in gate and drain leakage can be observed and finds its origin in surface or interface conductivity of the not fully optimized SiN. Nevertheless, for all devices the extrinsic transconductance has increased due to further carrier concentration enhancement in the access region by the passivation, and the best performance is achieved with maximum extrinsic transconductance of 260 mS/mm, which is among the highest reported for a 1 11m gate length e-mode HFET.
第四季氮化物增强模式HFET, 260ms /mm,阈值电压+0.5 V
提出了一种利用低极化的四元势垒层来降低界面电荷的异质结构设计新方法。增强模式(e-mode)异质结构场效应晶体管(HFET)由GaN缓冲层和四分之一势垒层组成,其组成和厚度经过精心选择,从而形成e-mode器件。该器件采用等离子体增强CVD,用120nm的SiN钝化。可以观察到栅极和漏极泄漏的增加,并发现其根源在于未完全优化的SiN的表面或界面电导率。然而,对于所有器件,由于钝化进一步增强了接入区的载流子浓度,外部跨导增加了,并且实现了最佳性能,最大外部跨导为260 mS/mm,这是报道的111m栅极长度e模HFET的最高性能之一。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信