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2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)最新文献

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Analysis and Design of Broadband, Transformer Based Matching Network 基于宽带变压器的匹配网络分析与设计
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278231
Chen Xing, Guixiang Jin, Tong Li, N. Yan, Yong Chen, Yue Lin, Hongtao Xu
{"title":"Analysis and Design of Broadband, Transformer Based Matching Network","authors":"Chen Xing, Guixiang Jin, Tong Li, N. Yan, Yong Chen, Yue Lin, Hongtao Xu","doi":"10.1109/ICSICT49897.2020.9278231","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278231","url":null,"abstract":"A specific analysis and design strategy of broadband transformer based matching network is presented in this paper. The structure consists of a transformer and two shunt capacitors at both terminals. A design example is given, the simulation shows that from 27GHz to 33GHz, the insertion loss is less than 1.5dB and the ripple is less than 0.15dB.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"27 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78680764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
From 5G to 6G: will compound semiconductors make the difference? 从5G到6G:化合物半导体会产生影响吗?
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278253
N. Collaert, A. Alian, A. Banerjee, Vikas Chauhan, R. ElKashlan, B. Hsu, M. Ingels, A. Khaled, K. Vondkar Kodandarama, B. Kunert, Y. Mols, U. Peralagu, V. Putcha, R. Rodriguez, A. Sibaja-Hernandez, E. Simoen, A. Vais, A. Walke, L. Witters, S. Yadav, H. Yu, M. Zhao, P. Wambacq, B. Parvais, N. Waldron
{"title":"From 5G to 6G: will compound semiconductors make the difference?","authors":"N. Collaert, A. Alian, A. Banerjee, Vikas Chauhan, R. ElKashlan, B. Hsu, M. Ingels, A. Khaled, K. Vondkar Kodandarama, B. Kunert, Y. Mols, U. Peralagu, V. Putcha, R. Rodriguez, A. Sibaja-Hernandez, E. Simoen, A. Vais, A. Walke, L. Witters, S. Yadav, H. Yu, M. Zhao, P. Wambacq, B. Parvais, N. Waldron","doi":"10.1109/ICSICT49897.2020.9278253","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278253","url":null,"abstract":"In this work, we will address the opportunities of a hybrid III-V/CMOS technology for next generation wireless communication, beyond 5G, moving to operating frequencies above 100GHz. Challenges related to III-V upscaling and CMOS co-integration using 3D technologies will be discussed.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"23 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80111648","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
An Integrated SoC for Image Processing in Space Flight Instruments 一种用于航天仪器图像处理的集成SoC
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278012
Xuan Liu, Jiangyi Shi, Zhaowei Su, Lintao Li
{"title":"An Integrated SoC for Image Processing in Space Flight Instruments","authors":"Xuan Liu, Jiangyi Shi, Zhaowei Su, Lintao Li","doi":"10.1109/ICSICT49897.2020.9278012","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278012","url":null,"abstract":"An integrated SoC called Image processing SoC (Image-SoC), that is aimed at speeding-up the digital image processing capability of space instruments by providing a convenient hardware infrastructure, is proposed in this paper. A RISC-V processor is used in Image-SoC to implement control and monitoring functions. The module composition and data processing process of SoC will be introduced in detail below. In order to enable the use of Image-SoC in deep space mission, the SoC implements the radiation hardening by design (RHBD) techniques based on the EDAC. Finally, The SoC supports multiple working modes to achieve different image processing under different requirements. Logic synthesis results based on SIMC 40nm technology library show that the clock frequency of the Image-SoC can reach 277 MHz.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"275 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83877951","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-voltage operation of high-density ferroelectric domain wall memory 高密度铁电畴壁存储器的低压运行
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278316
A. Jiang, Jun Jiang, Chao Wang
{"title":"Low-voltage operation of high-density ferroelectric domain wall memory","authors":"A. Jiang, Jun Jiang, Chao Wang","doi":"10.1109/ICSICT49897.2020.9278316","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278316","url":null,"abstract":"Nonvolatile ferroelectric domain wall memory was fabricated using X-cut single-crystal LiNbO3 thin films bonded to SiO2/Si wafers, where each LiNbO3 mesa cell was etched in contact to two side Pt metal electrodes. In-plane electric-field poling along the polar Z axis above a coercive field of 750 kV/cm induced non-volatile switching of ferroelectric domains in the cell with domain walls (DWs) created within the substrate. The DWs are erasable and electrically conductive in a high on-off ratio (>106), showing potential for application in a large-scale crossbar memory. However, the coercive field is too high to prevent low-voltage operations of the memory in a fast switching speed and low-energy consumption. Here we exhibited a method to lower the coercive field significantly by introduction of the reversed seeding domain under one electrode that extends over the cell surface slightly. The seeds facilitate the wall sideways motion in a small driving field, paving the way toward the low-voltage manipulation of domain wall nanodevices.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"63 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86144398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analog/Mixed-Signal Circuit Testing Technologies in IoT Era 物联网时代的模拟/混合信号电路测试技术
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278194
Haruo Kobayashi, A. Kuwana, Jianglin Wei, Yujie Zhao, Shogo Katayama, Tran Minh Tri, Manato Hirai, Takayuki Nakatani, K. Hatayama, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa
{"title":"Analog/Mixed-Signal Circuit Testing Technologies in IoT Era","authors":"Haruo Kobayashi, A. Kuwana, Jianglin Wei, Yujie Zhao, Shogo Katayama, Tran Minh Tri, Manato Hirai, Takayuki Nakatani, K. Hatayama, Keno Sato, Takashi Ishida, Toshiyuki Okamoto, Tamotsu Ichikawa","doi":"10.1109/ICSICT49897.2020.9278194","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278194","url":null,"abstract":"This paper introduces our production testing research results for analog and mixed-signal SoC in IoT era, such as operational amplifier, ADC, sampling circuit, timing related testing technologies. Notice that production testing and measurement / characterization for ICs are similar but different, and this paper introduces the former. The analog / mixed-signal testing plays a very important role in achieving both reliability and low cost for IoT and automotive systems. It also is a big technological challenge because there is no general method, but it requires state-of-the-art combination and optimization of a wide variety of technologies including circuit and system design as well as signal processing, control and measurement algorithms. Their overview including future technology challenges is described.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"62 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88573962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Deep Spiking Binary Neural Network for Digital Neuromorphic Hardware 数字神经形态硬件的深度尖峰二值神经网络
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278275
Zilin Wang, Kefei Liu, Xiaoxin Cui, Yuan Wang
{"title":"Deep Spiking Binary Neural Network for Digital Neuromorphic Hardware","authors":"Zilin Wang, Kefei Liu, Xiaoxin Cui, Yuan Wang","doi":"10.1109/ICSICT49897.2020.9278275","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278275","url":null,"abstract":"The spiking neural network (SNN) converted from artificial neural network (ANN) usually contains many high-precision parameters. This will cause a lot of hardware resources to be consumed. A spiking binary neural network is proposed in this paper, whose weights are binary and it does not contain high-precision parameters. Experimental results show that the proposed network can be adapted to the neuromorphic chip and reduce memory consumption by 16 times without much loss of accuracy.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"22 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77195796","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Dual-Source Energy Harvester with MPPT Technology based on Double Stack Resonance 基于双叠共振的MPPT双源能量采集器
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278202
Keke Wang, Xiudeng Wang, Yinshui Xia
{"title":"Dual-Source Energy Harvester with MPPT Technology based on Double Stack Resonance","authors":"Keke Wang, Xiudeng Wang, Yinshui Xia","doi":"10.1109/ICSICT49897.2020.9278202","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278202","url":null,"abstract":"This paper proposed a single-inductor dual-source energy harvesting circuit with maximum power point tracking (MPPT) technology based on double stack resonance. It employs the buck-boost interface circuit to convert energy from a photovoltaic (PV) cell and a thermoelectric generator (TEG). The proposed circuit includes three operating modes called single thermoelectric mode (STM), single photoelectric mode (SPM) and dual-source mode (DM). The three modes are automatically selected according to whether the two sources reach their maximum power point. According to the simulation results. The peak conversion efficiency of the interface circuit is 86.3% and the MPPT efficiencies of the two sources are 98.75% and 99.1 % respectively.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"7 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77257103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrothermal Model Parameters Extraction and Evaluation Based on BSIM-CMG for 7-nm Nanosheet Gate-All-Around Transistor 基于BSIM-CMG的7nm纳米片栅极全能晶体管电热模型参数提取与评价
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278358
Renhua Liu, Siwen Yang, Xiaojin Li, Yabin Sun, Yanling Shi
{"title":"Electrothermal Model Parameters Extraction and Evaluation Based on BSIM-CMG for 7-nm Nanosheet Gate-All-Around Transistor","authors":"Renhua Liu, Siwen Yang, Xiaojin Li, Yabin Sun, Yanling Shi","doi":"10.1109/ICSICT49897.2020.9278358","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278358","url":null,"abstract":"In this paper, the BSIM-CMG model parameters are extracted for the nanosheet gate-alI-around (GAA) transistors with considering the temperature distribution and self-heating (SH) effect. The data used for parameter extraction is obtained from the 3-D TCAD simulation, which is calibrated with the experimental data to ensure the analysis accuracy. The extracted model and its parameter are validated from -40°C to 125°C. In order to evaluate our extracted model, the performance of the 6T-SRAM is investigated considering SH effect within different ambient temperature (TA). The results show that the read and write noise margins are all degenerated with increasing TA, and the static power increases as expected.","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"12 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87677496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fall Detection Based on an Inertial Sensor and a Customized Artificial Neural Network Algorithm 基于惯性传感器和自定义人工神经网络算法的跌倒检测
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278235
Wei Ma, Zhiming Xiao, Xiaosai Liu, Dongyang Tang, Weibo Hu
{"title":"Fall Detection Based on an Inertial Sensor and a Customized Artificial Neural Network Algorithm","authors":"Wei Ma, Zhiming Xiao, Xiaosai Liu, Dongyang Tang, Weibo Hu","doi":"10.1109/ICSICT49897.2020.9278235","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278235","url":null,"abstract":"With an aging population, falls have become a significant safety hazard, especially for the elderly. This paper proposes a fall detection system based on a 6-axis inertial sensor to collect body movement information and a customized artificial neural network to process the signals. Both the acceleration and the angular velocity are utilized for accuracy measurement. Instead of the typical threshold-based algorithm, a MIMO neural network is customized for fall detection. Rather than simply distinguish between falls and other activities, the system is able to recognize the non-fall behaviors, including running, sitting and walking. The whole device is implemented on a pegboard. Experiment results show that the detection specificities of these behaviors are all above 96% and the whole system accuracy reaches 96.8%. Keywords-fall detection, inertial sensor, neural network, behavior recognition","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"130 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86934103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
RC Tightened Corner Test structure Design and Silicon Characterization in FinFET Technology 在FinFET技术中RC紧角测试结构设计和硅表征
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) Pub Date : 2020-11-03 DOI: 10.1109/ICSICT49897.2020.9278392
Lijie Sun, Mengying Zhang, Guangxing Wan, W. Wong, Zhen Zhou, Xiaojin Li, Yabin Sun, Yanling Shi
{"title":"RC Tightened Corner Test structure Design and Silicon Characterization in FinFET Technology","authors":"Lijie Sun, Mengying Zhang, Guangxing Wan, W. Wong, Zhen Zhou, Xiaojin Li, Yabin Sun, Yanling Shi","doi":"10.1109/ICSICT49897.2020.9278392","DOIUrl":"https://doi.org/10.1109/ICSICT49897.2020.9278392","url":null,"abstract":"In this work, we propose a novel RC tightened corner test structure for FinFET Technology. In this test structure, Parasitic RC DUTs (Design Under Test) integrated into RO (Ring Oscillator) have been designed to verify and calibrate MEOL (Mid-End-Of-Line) and BEOL (Back-End-Of-Line) RC tightened corner; On the other hands, addressable-array circuit has been used to avoid noise induced by the local variation of FEOL (Front-End-Of-Line) transistors. By the test structure silicon data, RC tightened corners generated from statistical simulation have been iterated and updated","PeriodicalId":6727,"journal":{"name":"2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)","volume":"14 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87248346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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