2020 IEEE 70th Electronic Components and Technology Conference (ECTC)最新文献

{"title":"First Principle Analysis of Li-Doped Armchair Graphene Nanoribbons for Nanoscale Metal Interconnect Applications","authors":"V. Nishad, Rohit Sharma","doi":"10.1109/ectc32862.2020.00355","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00355","url":null,"abstract":"In this paper, the effect of alkali metal, Li, as substitutional doping in armchair Graphene Nanoribbons (AGNRs) is investigated. Electronic and transport properties and structural stability of Li-doped AGNRs are investigated using density functional theory (DFT) and non-equilibrium Green's function (NEGF). First principle calculations have been performed on pristine (undoped), center Li-doped, one-edge Li- terminated and both-edge Li-terminated AGNRs. Our calculations reveal that all the structures analyzed are thermodynamically stable. Based on transmission spectrum and standard two-probe setup based I-V characteristics of all the considered configurations, center Li-doped AGNRs are found to be the most suitable candidate for on-chip interconnect applications. For center Li-doped AGNRs, kinetic inductance, Lk, and quantum capacitance, CQ, are extracted as 12.51 nH/μm and 2.7 fF/μm, respectively, which results in nearly 7x, 2.5x and 1.1x higher current as compared to pristine, one-edge Li-terminated and both-edge Li-terminated AGNRs, respectively. We have also compared our results with center Fe-doped AGNRs, where center Li-doped AGNRs provide 1.71x higher current. Our study suggests about the substitutional doping of Li at the center in AGNRs make it an excellent metal that can be used in advanced nanoscale interconnect applications. In addition, this study can be extended towards the use of multiple layers of center Li-doped AGNRs in future that may further improve the interconnect performance.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"1 1","pages":"2278-2283"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87557570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development of bonding process for flexible devices with fine-pitch interconnection using Anisotropic Solder Paste and Laser-Assisted Bonding Technology","authors":"Jiho Joo, Y. Eom, Ki-seok Jang, Gwang-Mun Choi, Kwang-Seong Choi","doi":"10.1109/ectc32862.2020.00207","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00207","url":null,"abstract":"We bonded 70μm-thick Si chip and PI substrate with anisotropic solder paste (ASP) using laser-assisted bonding (LAB). ASP contains 5 vol.% of Sn/58Bi type 5, 6 vol.% of nonconductive PMMA balls with diameter of 20μm and thermosetting resin. We have applied ASP on the metal pattern on PI substrate. We have aligned the 70μm-thick Si chip on the PI substrate, and applied pressure to keep the bond line thickness uniform. Then, homogenized laser of which wavelength is 980nm, was irradiated on the Si chip for 5 seconds. When the laser is irradiated to the Si chip, the Si absorbs the laser and its temperature rises. Due to the high thermal conductivity of the Si and electrodes, the heat flux is concentrated on the electrode. Thus selective-solder joint is formed only between the electrodes of the chip and substrate. After the bonding process, we have cured bonded devices at 80°C for 2 hours. Measured contact resistance was ~0.03˟. There were no vaporized substances during the LAB process and the cleaning process is not necessary because the ASP contains no conventional flux and solvent.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"29 1","pages":"1309-1314"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82647660","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Antenna on Silicon Interconnect Fabric","authors":"A. Dasgupta, A. Alam, Guangqi Ouyang, SivaChandra Jangam, S. Iyer","doi":"10.1109/ectc32862.2020.00279","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00279","url":null,"abstract":"In this paper we demonstrate a 20 GHz patch antenna on the Silicon-Interconnect Fabric (Si-IF) platform. Two methodologies to integrate the antenna are explored in this paper. One is to embed a Fused Silica die inside a recess etched on the Si-IF. The second method is to compression mold Polydimethylsiloxane (PDMS) into the Si-IF recess. The antennas fabricated with both the methods are compatible with Ground- Signal-Ground (GSG) probing, and interfacing with off the shelf MMIC dies. Along with the process flow, we also present experimental characterisation of the fabricated antennas.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"31 1","pages":"1788-1794"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82893579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Demonstration of Package Level 3D-printed Direct Jet Impingement Cooling applied to High power, Large Die Applications","authors":"Tiwei Wei, H. Oprins, V. Cherman, Z. Yang, K. Rivera, G. van der Plas, B. Pawlak, L. England, E. Beyne, M. Baelmans","doi":"10.1109/ectc32862.2020.00225","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00225","url":null,"abstract":"This work presents, for the first time, a package- level, bare die liquid jet impingement 3D polymer microfluidics heatsink fabricated using 3D printing, or additive manufacturing for large die size and high-power applications. The heatsink achieves a chip temperature increase of 17.5°C at a chip power of 285 W for a coolant flow rate of 3.25 LPM, demonstrating that 3D printing enables the design for low-cost, high efficiency direct on-chip microfluidic heatsink with complex internal 3D manifold liquid delivery channels. The measurement results show that the jet impingement cooling performance can be successfully described using a unit cell approach, allowing an easy scaling of the thermal performance for arbitrary die size applications. Long term thermal tests of 1000h show a constant thermal performance and no degradation of the cooler material.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"97 1","pages":"1422-1429"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86716517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development of Long Term Stable Multiple-Ion- Selective Sensors for Agriculture and Aquaculture applications","authors":"Yu Chen, Shermin S. Goh, Ramona B. Damalerio, Weiguo Chen, D. Choong, Jason Y. C. Lim, L. Moh, Georgina E K K Seah, A. Y. X. Tan","doi":"10.1109/ectc32862.2020.00162","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00162","url":null,"abstract":"An integrated multiplex all-solid-state, polymer membrane-based ion-selective-electrode was designed and fabricated. The device includes an on-chip Pt pseudo-reference electrode and three independent Au working electrode. Nitrate, potassium, and phosphate selective membranes are coated on three electrodes independently. The sensitivity, selectivity, and stability of the device are evaluated using a laboratory-made measurement circuit board for ion concentrations from 10 μM to 100 mM.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"1 1","pages":"997-1002"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83100421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hybrid vanadate silicon nanophotonic platform for extreme light management at telecom bands","authors":"Yusheng Bian, A. Jacob, Won Suk Lee, Bo Peng, M. Rakowski, A. Aboketaf, R. Augur","doi":"10.1109/ectc32862.2020.00039","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00039","url":null,"abstract":"We present a hybrid vanadate/silicon-photonics platform that integrates vanadate nanostructures with silicon-on-insulator (SOI) waveguides for high-performance functional passive building blocks at telecommunication wavelengths. Comprehensive numerical analysis is performed to study the mode hybridization in a hybrid waveguide structure that comprises a silicon ridge separated from a vanadate substrate. Studies on the impact of key geometric parameters reveal that the coupling between vanadate and photonic structures result in highly confined hybrid modes with extreme field confinement and significantly larger effective indices as compared to hybrid plasmon polarizations (HPPs) supported by noble-metal-based waveguiding systems. By leveraging the unique confinement and modal properties offered by vanadate material, we explore the feasibility of building ultra-compact waveguide attenuators and transverse-magnetic (TM)-pass polarizers based on proper combinations of vanadate and SOI configurations. Our studies indicate that a 5μm-long attenuator can simultaneously achieve over 30 dB absorption and a low optical return loss less than -27 dB for both transverse-electric (TE) and TM polarizations. In addition, through proper management of the interactions between vanadate and silicon modes with different polarizations, we numerically demonstrate an ultra-compact (3 μm) on-chip TM-pass polarizer featuring low insertion loss (~ 3 dB), in conjunction with an extinction ratio exceeding 22 dB. The integration of vanadate materials with SOI platforms thereby offers the potential to bridge a gap in conventional silicon photonic systems and opens new avenues towards scalable functional integrated silicon photonic devices at telecom bands.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"66 1","pages":"168-174"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83844268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Metamaterial-inspired dual-function loop antenna for wireless power transfer and wireless communications","authors":"Woosol Lee, Hae-in Kim, Y. Yoon","doi":"10.1109/ECTC32862.2020.00214","DOIUrl":"https://doi.org/10.1109/ECTC32862.2020.00214","url":null,"abstract":"This paper first presents a metamaterial-inspired dual-function loop antenna for wireless power transfer and wireless communication which operates at 6.78 MHz (AirFuel Alliance standard frequency) and 2.4 GHz. The proposed metamaterial slab with a dimension of 33.6 mm × 33.6 mm is integrated on top of the single-turn loop antenna. The demonstrated metamaterial slab has an enhanced dual-band property for WPT and wireless communications with electromagnetic wave focusing capability. A prototype metamaterial-inspired dual-function loop antenna for simultaneous WPT and wireless communications is designed, fabricated and characterized. It shows a size reduction of 50 % compared to a device consisting of a separate WPT coil and a separate wireless communication antenna, a WPT efficiency improvement of 28.07 % (a factor of 4.19 improvement) at a distance of 100 mm compared with a device without a metamaterial slab, and an antenna gain improvement of 1.89 dB compared with a device without a metamaterial slab.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"73 1","pages":"1351-1357"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79220831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Low Loss BT resin for substrates in 5G communication module","authors":"Katsuya Yamamoto, Shouta Koga, Saori Seino, Kazuyuki Higashita, Keiichi Hasebe, Eisuke Shiga, Tsuyoshi Kida, Syu Yoshida","doi":"10.1109/ectc32862.2020.00280","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00280","url":null,"abstract":"Roles of low-loss PCB materials are becoming more important along with the expansion of IoT (Internet of Things). Particularly, high speed and wide band data transmissions in 5G and the following generations are core technologies to progress IoT [1], and many PCB materials have been proposed and the evaluations are ongoing. However, the low loss transmission still has to be improved furthermore so that the advanced communications can be utilized without any limitation. BT (Bis-maleimide & Triazine) resin, a kind of thermosetting resin materials has excellent mechanical and electrical properties derived from unique polymer net-working [2]. In this study, new BT resin designed for 5G and the following generations was developed [3]. Generally, PCB materials aiming for low loss transmission need to have low Dk (Dielectric Constant) and low Df (Dissipation Factor). Then the new BT resin was designed to have lower Dk and Df than the conventional BT resins ever had.In this study, compatibility of BT resin varnish was investigated firstly. Because, typically, some components bringing low Dk and low Df to BT resin show poor compatibilities with the main components due to the difference of polarity. Secondly, adhesion to copper foils was studied. To reduce the transmission loss, copper foils laminated on BT composite (BT resin fillers glass clothes) are desired to have low surface profiles. So, it was necessary to keep adhesion even if anchoring effect became smaller. Finally, BT laminates and package substrates were fabricated to assess mechanical behaviors, the electrical reliability and the transition of Df under high temperature or/and high humidity conditions. Especially, the stability of the dielectric properties under harsh conditions is very important to ensure the advanced electrical modules under actual environments.As the conclusion of this study, the novel BT resin has been developed and the excellent performances were successfully demonstrated. The next challenge following this study is ongoing.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"38 1","pages":"1795-1800"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80802598","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Process Window Enhancement of Via Holes for Fine Pitch RDL by Design Optimization","authors":"C. McCold, R. Hsieh, H. Nguyen, W. Flack, J. Slabbekoorn, Andy Miller","doi":"10.1109/ectc32862.2020.00179","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00179","url":null,"abstract":"Wafer-level packaging with high density fan-out (HDFO) requires multiple redistribution layers (RDL) to handle the high-density interconnections and the large data transfer rates between chips in the package. Decreasing the critical dimension (CD) of lines in an RDL enables electrical performance that meets the system requirements with fewer layers, which lowers costs. Reducing RDL line CD also requires reducing the CD for the interconnections (via) in the dielectric layer. The lithographic imaging of small via openings presents multiple challenges. The first challenge is obtaining good lithographic performance of the permanent photosensitive polymer used to define the dielectric layer between the metal layers. The second challenge is the increased difficulty of imaging a via compared to imaging a line of the same critical dimension, due to both the smaller area of light modulation used to transfer the pattern and the diffraction of the light as it passes through the imaging system. To address these challenges, in this study we relax the dimension of the round via in the direction parallel to the RDL line, creating an elongated via. This design change significantly improves the intensity distribution at the wafer (aerial image) for the via, which increases the effective process window [1].In this paper we investigate the performance of a negative-tone photosensitive permanent dielectric for 1.0 - 2.0 pm CD vias. The permanent photosensitive polymer material is used in a dual damascene RDL process, and previous studies have demonstrated sufficient resolution and process capability [2]. We investigate multiple length-to-width ratios for the vias using both lithographic simulation and experiment to determine the optimal via shape to maximize the process window. In this paper we present both modeled and experimental lithography test results. The process window for the elongated vias shows significant improvement compared to the symmetric via for fine-pitch RDL applications.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"1 1","pages":"1114-1119"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89299972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A study on laser-assisted bonding (LAB) and its influence on luminescence characteristics of blue and YAG phosphor encapsulated InGaN LEDs","authors":"Matthias Fettke, Andrej Kolbasow, Vinith Bejugam, Timo Kubsch, Alexander Frick, T. Teutsch, Yu-Chung Wang, J. Rantala","doi":"10.1109/ectc32862.2020.00301","DOIUrl":"https://doi.org/10.1109/ectc32862.2020.00301","url":null,"abstract":"This work is a sincere attempt to answer the question whether laser assisted bonding (LAB) is a feasible method for producing stable and reliable solder interconnections of LED devices without any negative impact on the LED chip performance. To meet these requirements, a bonding process was evaluated that induces marginal thermal and mechanical loads into the LED chip to prevent any changes in the quantum well (QW) structure. The bonding process uses a LAB \"LaPlace\" system with a 280W Q-CW solid-state, near infrared (NIR) laser source.By varying the laser parameters, the functionality of the bonded LED was characterized and a suitable process window, along with the corresponding energy threshold, was examined for the chosen LED configuration. A 700μm thick copper lead-frame test substrate was selected, and subjected to AgNi metallization. Furthermore, InGaN blue LED test chips (type EDI-FA445B) with 150μm pad-to-pad spacing, and 3μm SnAu 20/80 solder connections were used. Overall, this study compares a non-encapsulated LED version to an encapsulated (NYAG4454-L) one.To determine a suitable LAB process window, metallurgical properties of the soldered interface were examined microscopically by polishing a cross-section on the one hand, and conducting electrical qualification on the other. The mechanical load capacity was measured with a shear test unit, and the corresponding metallurgical fractures were optically inspected. The optical spectrum of the LED after bonding was studied with a \"spectroradiometer\" to identify shifts in the wavelength corresponding to electroluminescent emissions peaks. The impact of a \"thermal-test\" on the bonding quality was further evaluated. Additionally, the interface quality was correlated with the performance data in relation to LAB bonding parameters.Finally, this work introduces a laser assisted rework process i.g. laser assisted de-bonding (LAdB) for the de-bonding of faulty LEDs. The future prospects of intended reliability and stability for LED placement as well as a skillful approach for rapid, laser-assisted placement of mini- and micro-LEDs using the \"LaPlace\" systems are elucidated.","PeriodicalId":6722,"journal":{"name":"2020 IEEE 70th Electronic Components and Technology Conference (ECTC)","volume":"15 1","pages":"1928-1934"},"PeriodicalIF":0.0,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89428378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}