Integration-The Vlsi Journal最新文献

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Hardware efficient approximate sigmoid activation function for classifying features around zero
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-04-11 DOI: 10.1016/j.vlsi.2025.102421
Shreya Venkatesh, R. Sindhu, V. Arunachalam
{"title":"Hardware efficient approximate sigmoid activation function for classifying features around zero","authors":"Shreya Venkatesh,&nbsp;R. Sindhu,&nbsp;V. Arunachalam","doi":"10.1016/j.vlsi.2025.102421","DOIUrl":"10.1016/j.vlsi.2025.102421","url":null,"abstract":"<div><div>The binary classification of features around zero in an RNN-LSTM network requires accurate sigmoid activation. The approximate sigmoid activation function is preferred to reduce the computational complexity and hardware resources. Therefore, an IMDB dataset is considered for the Python-based data analysis, the features are passed through the LSTM layer, the dense layer, and finally the sigmoid activation function for binary classification. From the analysis, an approximate 3-term, 8-segment Taylor series sigmoid (<span><math><mrow><mrow><msub><mi>σ</mi><mrow><mi>T</mi><mo>_</mo><mn>3</mn><mo>_</mo><mn>8</mn></mrow></msub><mrow><mo>(</mo><mi>x</mi><mo>)</mo></mrow></mrow><mo>)</mo></mrow></math></span> is proposed with an 11-bit customized floating-point (CFP) and provides sufficient accuracy. The <span><math><mrow><msub><mi>σ</mi><mrow><mi>T</mi><mo>_</mo><mn>3</mn><mo>_</mo><mn>8</mn></mrow></msub><mrow><mo>(</mo><mi>x</mi><mo>)</mo></mrow></mrow></math></span> is implemented with an efficient range select controller, data scheduler and area-efficient arithmetic processing unit (APU). The APU is implemented with a CFP multiplier (CFP-Mul) and Exponent-aware CFP adder (EACFP-Add). Therefore, the FPGA implementation uses fewer hardware resources (LUT, FF and DSP) and obtained 1658 <strong><em>μ</em></strong>m<sup>2</sup> and 0.3305 mW power at 500 MHz in TSMC 65 nm ASIC implementation. This proposed function <span><math><mrow><msub><mi>σ</mi><mrow><mi>T</mi><mo>_</mo><mn>3</mn><mo>_</mo><mn>8</mn></mrow></msub><mrow><mo>(</mo><mi>x</mi><mo>)</mo></mrow></mrow></math></span> is used in the LSTM cell and classification layer. With the IMDB and SMS spam detection datasets, it provides near-classification metrics compared to the exact <em>σ</em>(<em>x</em>).</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102421"},"PeriodicalIF":2.2,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143823230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of 1T2R ReRAM array for in memory element-wise multiplication with distributed and majority logics
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-04-07 DOI: 10.1016/j.vlsi.2025.102418
Ancy Joy , Jinsa Kuruvilla
{"title":"Design of 1T2R ReRAM array for in memory element-wise multiplication with distributed and majority logics","authors":"Ancy Joy ,&nbsp;Jinsa Kuruvilla","doi":"10.1016/j.vlsi.2025.102418","DOIUrl":"10.1016/j.vlsi.2025.102418","url":null,"abstract":"<div><div>Multiplication is regarded as an essential component for inner product computation in Digital Signal Processing (DSP) applications. The frequent data transfers between the CPU and memory cause delays in traditional computer systems. In-memory computation (IMC) lowers latency by processing data at the location of storage. Because of its unique properties, Resistive Random-Access Memory (ReRAM) is a state-of-the-art non-volatile memory technology with many potential applications in IMC. On the other hand, the Conventional One Transistor One Resistor (1T1R) ReRAM bit-cell has a high bit-error rate and slower sensing during Non-Volatile Memory (NVM) storage. This study considers an in-memory element-wise multiplication using a One Transistor two Resistor (1T2R) ReRAM array. The adder-shifter module is the fundamental building block of element-wise multiplication. The majority logic is implemented in the proposed design as a memory READ operation. Additionally, distributed logics utilize look-up tables and adder-shifters to calculate inner products rather than multipliers and adders. It also addresses the high latency and intricate design associated with the traditional multiply and accumulate (MAC) method of implementing element-wise multiplication. According to the simulated results, the 1T2R cell uses less power and has a shorter write delay than the traditional 2T2R cell. Moreover, the sensing margin of the 1T2R bit cell remains 1.2 times larger than that of the 1T1R cell. In addition, compared to 1T1R and 2T2R cell-based designs, the proposed 1T2R design achieves 7.21 % and 48.24 % energy savings in element wise multiplication operation.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102418"},"PeriodicalIF":2.2,"publicationDate":"2025-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143815011","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
3D-multiscroll chaotic attractors design, circuit implementation and application to medical image encryption
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-04-04 DOI: 10.1016/j.vlsi.2025.102417
Jie Zhang, Jiangang Zuo
{"title":"3D-multiscroll chaotic attractors design, circuit implementation and application to medical image encryption","authors":"Jie Zhang,&nbsp;Jiangang Zuo","doi":"10.1016/j.vlsi.2025.102417","DOIUrl":"10.1016/j.vlsi.2025.102417","url":null,"abstract":"<div><div>Compared to traditional chaotic attractors, multiscroll chaotic attractors (MSCAs) have broad application potential in fields such as dynamical system research and information processing. This paper introduces 1D-MSCAs, 2D-MSCAs, and 3D-MSCAs based on the Sprott-A system by incorporating piecewise linear functions. Through a dynamical analysis using equilibrium points, Lyapunov exponents, and bifurcation diagrams, it is found that the MSCAs have no equilibrium points and possess hidden attractors. The system exhibits a rich variety of dynamical behaviors, including reverse multiplicative cycle bifurcation, transient chaos, and bursting chaos, as the parameters vary. Additionally, the system demonstrates initial offset behavior in response to changes in initial conditions. The MSCAs are validated through an analog circuit implementation. Furthermore, a novel cryptosystem is designed by integrating 3D-MSCAs with RNA operations, and its security performance is evaluated in terms of key sensitivity, histogram analysis, correlation, and information entropy. The analysis results indicate that the proposed cryptosystem offers high-security performance, providing a promising solution for medical image encryption.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102417"},"PeriodicalIF":2.2,"publicationDate":"2025-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143786121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Observability in systems with extreme multistability
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-04-04 DOI: 10.1016/j.vlsi.2025.102412
J.M. Rodríguez-Ornelas , R. Sevilla-Escoboza , Onofre Orozco-López , R.R. Rivera-Durón , V.P. Vera-Ávila
{"title":"Observability in systems with extreme multistability","authors":"J.M. Rodríguez-Ornelas ,&nbsp;R. Sevilla-Escoboza ,&nbsp;Onofre Orozco-López ,&nbsp;R.R. Rivera-Durón ,&nbsp;V.P. Vera-Ávila","doi":"10.1016/j.vlsi.2025.102412","DOIUrl":"10.1016/j.vlsi.2025.102412","url":null,"abstract":"<div><div>In control engineering and dynamical systems, obtaining accurate measurements of a system’s state vector can be challenging due to the inaccessibility of certain internal states or the prohibitive cost of measurement. To address these issues, observers are employed to reconstruct the system’s state. While linear observers have proven effective for linear systems, applying them to nonlinear systems presents additional challenges and opportunities. In this paper, we explored the design and implementation of a linear observer applied on a 6-variable dynamical system, namely extreme multistable Rössler system (EMRS). Our proposed methodology leverages observability indices and graphical representations to enhance the linearization process at points of maximum observability. This approach allows for generating the gain set for a Luenberger observer, thereby improving its performance in estimating the states of a complex nonlinear system such as the EMRS. Our numerical and experimental results demonstrate the effectiveness of linearization using observability coefficients for the design of a linear observer. This observer can efficiently track and reconstruct the dynamics of a multi-stable nonlinear system, enabling the use of a linear observer on a nonlinear system.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102412"},"PeriodicalIF":2.2,"publicationDate":"2025-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143768410","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A novel low-hardware-cost scan chain architecture resilient to scanSAT attack
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-04-01 DOI: 10.1016/j.vlsi.2025.102414
Fatih Tiryakioğlu , Ahmet Unutulmaz , İhsan Çiçek , Ali Tangel
{"title":"A novel low-hardware-cost scan chain architecture resilient to scanSAT attack","authors":"Fatih Tiryakioğlu ,&nbsp;Ahmet Unutulmaz ,&nbsp;İhsan Çiçek ,&nbsp;Ali Tangel","doi":"10.1016/j.vlsi.2025.102414","DOIUrl":"10.1016/j.vlsi.2025.102414","url":null,"abstract":"<div><div>Logic locking serves to protect a hardware design from an untrusted fabrication facility. A manufacturer may bypass the protection by performing a SAT attack by making use of the scan chain structure, which was designed to increase the testability of ICs. One way to prevent such attacks is to encrypt the scan chain using a cryptographic algorithm. However, adding dedicated encryption modules into the IC increases the cost. In this study, we reduced this cost by reusing the scan chain structure to be able to implement a cryptographic algorithm, the Trivium algorithm. Our implementation allows production, functional and mission mode field tests to be performed by an unreliable tester.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102414"},"PeriodicalIF":2.2,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143776505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 28-GHz highly efficient Class-J SiGe power amplifier with pi-type load network
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-03-25 DOI: 10.1016/j.vlsi.2025.102415
Vasileios Manouras, Yannis Papananos
{"title":"A 28-GHz highly efficient Class-J SiGe power amplifier with pi-type load network","authors":"Vasileios Manouras,&nbsp;Yannis Papananos","doi":"10.1016/j.vlsi.2025.102415","DOIUrl":"10.1016/j.vlsi.2025.102415","url":null,"abstract":"<div><div>This paper presents a 28-GHz, single-stage, Class-J Power Amplifier for potential use in mm-Wave 5G MIMO applications. A pi-type load network is proposed to provide the required fundamental and second harmonic impedance terminations for a Class-J operation mode. The PA is implemented in Infineon's 130 nm SiGe BiCMOS process achieving a saturation output power <span><math><mrow><msub><mi>P</mi><mrow><mi>s</mi><mi>a</mi><mi>t</mi></mrow></msub><mo>=</mo><mn>16.7</mn><mspace></mspace><mi>d</mi><mi>B</mi><mi>m</mi></mrow></math></span> and a remarkably high power-added efficiency <span><math><mrow><mi>P</mi><mi>A</mi><mi>E</mi><mo>=</mo><mn>42.8</mn><mspace></mspace><mo>%</mo></mrow></math></span> at 28 GHz. Moreover, the proposed PA exhibits an impressive average PAE of 17.2 % and 14.7 % respectively, while enabling 3 and 6 Gbps 64-QAM operation at an average output power of 8.09 and 7.15 dBm respectively. The in-band and out-of-band linearities, are &lt; -26 dB and &lt;-26.5 dBc respectively in the absence of any digital pre-distortion.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102415"},"PeriodicalIF":2.2,"publicationDate":"2025-03-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143715617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis of false lock in Mueller-Muller clock and data recovery system
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-03-24 DOI: 10.1016/j.vlsi.2025.102413
Yahao Fang , Deng Luo , Bin Liang , Jianjun Chen , Yaqing Chi , Hanhan Sun , Qian Sun , Jingtian Liu
{"title":"Analysis of false lock in Mueller-Muller clock and data recovery system","authors":"Yahao Fang ,&nbsp;Deng Luo ,&nbsp;Bin Liang ,&nbsp;Jianjun Chen ,&nbsp;Yaqing Chi ,&nbsp;Hanhan Sun ,&nbsp;Qian Sun ,&nbsp;Jingtian Liu","doi":"10.1016/j.vlsi.2025.102413","DOIUrl":"10.1016/j.vlsi.2025.102413","url":null,"abstract":"<div><div>As serializer/deserializer (SerDes) architectures evolve to support multi-Gbps data rates, Four-level Pulse Amplitude Modulation (PAM4) has emerged as the dominant signaling scheme owing to its superior spectral efficiency. However, the conventional Mueller-Muller Clock and Data Recovery (MMCDR) architecture exhibits critical false lock artifacts when processing PAM4 signals, leading to significant degradation in Jitter Tolerance (JTOL) and Bit Error Rate (BER). Through theoretical analysis, we demonstrate that the root cause lies in the misalignment between the sampled signal and decision values during phase detection. To address this limitation, we introduce a novel Phase Detector (PD) architecture. A comprehensive CDR behavioral model integrating the proposed PD is developed in Simulink. Simulation results demonstrate that the improved PD avoids false lock compared to conventional MMPD implementations. Furthermore, the proposed PD achieves superior jitter tolerance performance. These advancements provide a hardware-efficient and readily implementable solution for high-speed PAM4 SerDes systems operating in lossy channels.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102413"},"PeriodicalIF":2.2,"publicationDate":"2025-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143716156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Heuristic approaches to energy optimization in deep submicron bus design through QAP formulation
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-03-20 DOI: 10.1016/j.vlsi.2025.102404
Konstantinos Papalamprou
{"title":"Heuristic approaches to energy optimization in deep submicron bus design through QAP formulation","authors":"Konstantinos Papalamprou","doi":"10.1016/j.vlsi.2025.102404","DOIUrl":"10.1016/j.vlsi.2025.102404","url":null,"abstract":"<div><div>As modern microprocessors become increasingly interconnected, energy dissipation within digital circuits has emerged as a critical challenge, particularly in deep submicron (DSM) technologies where parasitic effects are significant. This paper addresses the energy reduction problem in DSM bus design by formulating it as a Quadratic Assignment Problem (QAP), an NP-hard combinatorial optimization problem. By leveraging this framework, optimal wire permutations that minimize energy dissipation are systematically pursued.Given the intractability of solving large-scale QAPs exactly, we evaluate heuristic algorithms for their effectiveness in approximating near-optimal solutions within a feasible timeframe. The study compares the performance of various heuristic approaches. Results demonstrate that certain methods achieve rapid convergence and significant energy reduction, proving their suitability for real-time applications. The analysis highlights the potential of heuristic methods as practical solutions for complex energy optimization problems in DSM bus systems.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102404"},"PeriodicalIF":2.2,"publicationDate":"2025-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143679061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Spherical chaotic trajectory tracking and formation of unmanned aerial vehicles in master–slave configuration with intermediary system
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-03-19 DOI: 10.1016/j.vlsi.2025.102405
A. Durán-Covarrubias , A. Arellano-Delgado , C. Cruz-Hernández , J.J. Cetina-Denis , R.M. López-Gutiérrez
{"title":"Spherical chaotic trajectory tracking and formation of unmanned aerial vehicles in master–slave configuration with intermediary system","authors":"A. Durán-Covarrubias ,&nbsp;A. Arellano-Delgado ,&nbsp;C. Cruz-Hernández ,&nbsp;J.J. Cetina-Denis ,&nbsp;R.M. López-Gutiérrez","doi":"10.1016/j.vlsi.2025.102405","DOIUrl":"10.1016/j.vlsi.2025.102405","url":null,"abstract":"<div><div>This proposal addresses the problem of tracking spherical chaotic trajectories using quadcopters. The backstepping control is used to stabilizes and individually controls the quadcopters. Subsequently, using a master–slave configuration, dynamic coupling is used as an intermediary system in conjunction with backstepping control in order to achieve synchronization and formation of quadcopters. In addition, an anti-collision calculation is implemented to avoid possible collisions between the quadcopters. The chaotic trajectory to be followed is generated using a hybrid dynamic system with a chaotic attractor, which generates pseudo-random values allowing the creation of chaotic trajectories of sphere type. The proposed control, coupling and trajectory tracking schemes are implemented in MATLAB and Julia. Experiments are implemented where the results show that the quadcopters achieve synchronization and formation of the proposed spherical chaotic trajectories.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102405"},"PeriodicalIF":2.2,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143678988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High-Precision Spatial Filtering with AI-driven control and multicolor laser testing for interferometric application
IF 2.2 3区 工程技术
Integration-The Vlsi Journal Pub Date : 2025-03-19 DOI: 10.1016/j.vlsi.2025.102406
Gregorio A. Oropeza-Gomez, J. Onofre Orozco-López, Francisco J. Casillas-Rodríguez, Francisco G. Peña-Lecona, Jesus Muñoz-Maciel, Miguel Mora-Gonzalez
{"title":"High-Precision Spatial Filtering with AI-driven control and multicolor laser testing for interferometric application","authors":"Gregorio A. Oropeza-Gomez,&nbsp;J. Onofre Orozco-López,&nbsp;Francisco J. Casillas-Rodríguez,&nbsp;Francisco G. Peña-Lecona,&nbsp;Jesus Muñoz-Maciel,&nbsp;Miguel Mora-Gonzalez","doi":"10.1016/j.vlsi.2025.102406","DOIUrl":"10.1016/j.vlsi.2025.102406","url":null,"abstract":"<div><div>This study presents a novel automated spatial filtering system designed for high-precision alignment and operation across multiple laser wavelengths. Spatial filtering has been a cornerstone of optical research and applications, playing a critical role in beam quality improvement, noise reduction, and the mitigation of back reflections. Building upon the advancements in pinhole designs, external-cavity configurations, and beam alignment methods, our system integrates a laser diode, a <span><math><mrow><mn>10</mn><mspace></mspace><mi>μ</mi><mi>m</mi></mrow></math></span> pinhole, servomotors for micrometric adjustments, and a CCD camera for real-time feedback. Robust testing was conducted with red, green, and blue lasers (635, 520, and 405 nm) to ensure consistent performance across varying wavelengths. The control mechanism employs a two-stage approach: coarse alignment using a back-propagation artificial neural network for efficient displacement estimation, followed by fine-tuning with an enhanced proportional–integral–derivative (PID) controller to achieve sub-micrometric precision. This hybrid approach addresses the limitations of traditional manual methods and standalone controllers, significantly reducing alignment time and improving accuracy. The software architecture, implemented in Python, LabVIEW, and MySQL, ensures cross-platform compatibility and modular integration into embedded systems. This automated solution is particularly suitable for holographic and interferometric experiments that demand continuous and precise spatial filtering. By achieving high reproducibility and adaptability across multiple wavelengths, this advancement offers a scalable and reliable solution to enhance experimental precision in optical research and engineering applications.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"103 ","pages":"Article 102406"},"PeriodicalIF":2.2,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143678963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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