Integration-The Vlsi Journal最新文献

Intra-class CutMix data augmentation based deep learning side channel attacks

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-02-01 DOI: 10.1016/j.vlsi.2025.102373

Runlian Zhang , Yu Mo , Zhaoxuan Pan , Hailong Zhang , Yongzhuang Wei , Xiaonian Wu

{"title":"Intra-class CutMix data augmentation based deep learning side channel attacks","authors":"Runlian Zhang , Yu Mo , Zhaoxuan Pan , Hailong Zhang , Yongzhuang Wei , Xiaonian Wu","doi":"10.1016/j.vlsi.2025.102373","DOIUrl":"10.1016/j.vlsi.2025.102373","url":null,"abstract":"<div><div>CutMix data augmentation can provide a large amount of augmented data for DL-SCA (deep learning side channel attacks) by generating new power traces. However, traces generated by CutMix may lose dependency with the new label, which may reduce the accuracy of the training model. In light of this, we propose an improved intra-class CutMix data augmentation method. Firstly, the original traces are classified by the label. Then, the original traces are selected by the same label constraint to generate new traces according to CutMix, which can ensure the dependency between the generated trace and its label. Furthermore, in order to maintain balance among different classified datasets, the traces are generated sequentially according to distinct labels. Finally, based on the augmented traces, the Multilayer Perceptron (MLP) and Convolutional Neural Network (CNN) models can be constructed and trained to recover the key of AES. In order to verify the effectiveness of the proposed method, we conduct experimental evaluations using the MLP and CNN models based on DPA-contest v4 dataset and ASCAD dataset. The test results show that the traces generated with the intra-class CutMix method can be very similar to the original traces, and the MLP and CNN models can be effectively trained based on the generated traces to recover the key of AES. Besides, compared with existing data augmentation methods, the proposed method can complete secret key recovery with faster convergence and fewer traces.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"102 ","pages":"Article 102373"},"PeriodicalIF":2.2,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143146483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Performance analysis of 4:1 MUX APUF Architecture Implemented on Zynq 7000 SoC FPGA

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-02-01 DOI: 10.1016/j.vlsi.2025.102379

Kaveri Hatti, C. Paramasivam

{"title":"Performance analysis of 4:1 MUX APUF Architecture Implemented on Zynq 7000 SoC FPGA","authors":"Kaveri Hatti, C. Paramasivam","doi":"10.1016/j.vlsi.2025.102379","DOIUrl":"10.1016/j.vlsi.2025.102379","url":null,"abstract":"<div><div>Physical unclonable functions (PUF) are a type of physical system that harvests data from integrated circuits fragile physical components. These systems offer a highly secure way to generate cryptographic keys for cryptographic operations and protect secure IPs from threats, manipulation, and duplication due to their un-clonability properties. Prior literature has designed various Arbiter PUFs with 2:1 MUX, but they consume a large area to generate the larger response bits. Based on our literature survey, this is the first paper to design an Arbiter PUF with 4:1 MUX, which reduces the area overhead. This paper utilizes a 4:1MUX APUF design is implemented on 10 ZYNQ-7000 SoC FPGA devices using the LUT6 primitive to overcome the challenge of designing an unbiased PUF architecture on the FPGA device. The study also presents two different methodologies to generate responses for the corresponding challenge of 4:1 MUX Arbiter PUF. The design showed a uniqueness rate of 49 % when evaluated on both methodologies. The dependability percentages for temperature fluctuations (20–70 °C) were 99 %. Finally, the performance parameter of the proposed PUF is state-of-the-art.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"102 ","pages":"Article 102379"},"PeriodicalIF":2.2,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143146484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Language semantics to support secure computation and communication in embedded systems via hardware monitors

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-02-01 DOI: 10.1016/j.vlsi.2025.102367

Garett Cunningham , Siqin Liu , Harsha Chenji , David Juedes , Avinash Karanth

{"title":"Language semantics to support secure computation and communication in embedded systems via hardware monitors","authors":"Garett Cunningham , Siqin Liu , Harsha Chenji , David Juedes , Avinash Karanth","doi":"10.1016/j.vlsi.2025.102367","DOIUrl":"10.1016/j.vlsi.2025.102367","url":null,"abstract":"<div><div>As embedded systems with manycores and Network-on-Chips (NoCs) become ubiquitous, emerging hardware and software vulnerabilities have made it challenging to ensure system integrity especially when third-party intellectual property (IP) is used for rapid prototyping. Prior works have evaluated hardware monitors for ensuring correctness of the system by threat assessment and effective mitigation. However, none have evaluated models that combine both computation (processor pipeline) and communication (NoC) vulnerabilities simultaneously. In this paper, we propose a high-level policy language called d-GUARD that is used to define runtime security policies that can be compiled into hardware monitors. The advantage of this new language is the ability to dynamically change policies based on program’s runtime behavior. To translate high-level policies into low-level hardware monitors, we describe a compiler for d-GUARD that synthesizes policies into Verilog modules. Instead of simply evaluating the design of secure policies for processor pipelines, we extend to secure NoC microarchitectures, including policies for links and routers, as well as policies to prevent Denial-of-Service (DoS) attacks. To mitigate attacks against secure microarchitectures, we also propose fault-tolerant routing approaches to avoid rogue routers when the number of policy violations exceeds a certain threshold. Our secure policies for processor pipelines and NoC microarchitectures consume marginal area and power overhead when compared to baseline making it well suited for low-cost embedded systems.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"102 ","pages":"Article 102367"},"PeriodicalIF":2.2,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143288596","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A wide-input-range boost converter with three-phase self-start and adaptive zero current detector for photovoltaic energy harvesting

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-02-01 DOI: 10.1016/j.vlsi.2025.102376

Hao Wang, Ping Luo, Xiangwen Xin, Yunze Li

引用次数: 0

Lossless grounded capacitance multipliers using two CFOAs and a grounded capacitor

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-01-31 DOI: 10.1016/j.vlsi.2025.102375

Tolga Yucehan

{"title":"Lossless grounded capacitance multipliers using two CFOAs and a grounded capacitor","authors":"Tolga Yucehan","doi":"10.1016/j.vlsi.2025.102375","DOIUrl":"10.1016/j.vlsi.2025.102375","url":null,"abstract":"<div><div>Two new lossless grounded capacitance multipliers (GCMs) are proposed, in which a grounded capacitor and two current-feedback operational amplifiers (CFOAs) are used. Nevertheless, two floating resistors are used in the proposed GCMs. The proposed GCMs consist of three passive components. Thus, the proposed GCMs are obtained with a minimal quantity of passive components. The proposed GCMs have a high operating frequency range at a high multiplying factor. Identical passive component requirements are not needed in the proposed GCMs. In addition, the proposed GCMs can be controlled electronically by using the current-controlled current conveyor with a buffer instead of the second CFOA. However, there is no investigation on electronic tunability in this study. 0.18 μm CMOS technology parameters are employed for the CFOAs used in the proposed lossless GCMs. The layout area of the CFOA is 978.75 μm<sup>2</sup>. All simulations are performed with the SPICE program. In all simulations, supply voltages of the CFOA are selected as ±1.25 V. The simulation results verified the theoretical results from about 30 Hz to 3 MHz. The simulation results show that temperature changes do not affect the proposed GCMs much. The proposed circuits consume 1.91 mW power. In addition, the GCMs in this paper are used in the first-order active low-pass filter, and experiments of these circuits are achieved with AD844s, which are commercial devices for the CFOAs. Also, the experimental results confirm the theoretical results from about 2.5 kHz to 1 MHz.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"102 ","pages":"Article 102375"},"PeriodicalIF":2.2,"publicationDate":"2025-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143146481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

156 dB low-voltage low-power CMOS exponential function generator circuit

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-01-31 DOI: 10.1016/j.vlsi.2025.102363

Cosmin Radu Popa

引用次数: 0

Extrinsic calibration of complex machine vision system for mobile robot

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-01-31 DOI: 10.1016/j.vlsi.2025.102370

Ruben Alaniz-Plata , Fernando Lopez-Medina , Oleg Sergiyenko , Wendy Flores-Fuentes , Julio C. Rodríguez-Quiñonez , Cesar Sepulveda-Valdez , José A. Núñez-López , David Meza-García , José Fabián Villa-Manríquez , Humberto Andrade-Collazo , Vera Tyrsa

{"title":"Extrinsic calibration of complex machine vision system for mobile robot","authors":"Ruben Alaniz-Plata , Fernando Lopez-Medina , Oleg Sergiyenko , Wendy Flores-Fuentes , Julio C. Rodríguez-Quiñonez , Cesar Sepulveda-Valdez , José A. Núñez-López , David Meza-García , José Fabián Villa-Manríquez , Humberto Andrade-Collazo , Vera Tyrsa","doi":"10.1016/j.vlsi.2025.102370","DOIUrl":"10.1016/j.vlsi.2025.102370","url":null,"abstract":"<div><div>Autonomous mobile robots are essential in industry, logistics, and service applications, such as infrastructure inspection, where navigation in dark and narrow environments is one of the most challenging tasks. This project presents the design and development of a patented artificial vision system for a mobile robot, which combines a high-precision laser scanner and a stereo-vision system. The objective is to enhance the robot’s surface scanning capabilities in complex environments. The proposed methodology allows to determine the relative position between systems to integrate data of the laser scanner with stereo-vision cameras and inertial sensors, providing robust and accurate environmental perception that enables the characterization of ventilation ducts surface. Experimental results show a mean correspondence error of <span><math><mrow><mn>7</mn><mo>.</mo><mn>4515</mn><mspace></mspace><mi>mm</mi></mrow></math></span> in absolute terms for the combined data.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"102 ","pages":"Article 102370"},"PeriodicalIF":2.2,"publicationDate":"2025-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143288287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Comparison of integer-order chaotic attractors as randomness source in collision-free robotic exploration methods

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-01-30 DOI: 10.1016/j.vlsi.2025.102372

C. Sánchez-López, R. Ochoa-Montiel, E. Reyes-Pérez, C. Muñiz-Montero

{"title":"Comparison of integer-order chaotic attractors as randomness source in collision-free robotic exploration methods","authors":"C. Sánchez-López, R. Ochoa-Montiel, E. Reyes-Pérez, C. Muñiz-Montero","doi":"10.1016/j.vlsi.2025.102372","DOIUrl":"10.1016/j.vlsi.2025.102372","url":null,"abstract":"<div><div>This article presents a comparison on the use of integer-order chaotic waveforms in collision-free robotic navigation methods. Each state-variable associated with the Lorenz’s, Rossler’s, Chen’s, Liu’s, Chua’s and Saturated Nonlinear Function Series system is used to compute the coverage, which represents the effectiveness over the amount of the total area covered by the mobile robot. As a result, it can be deduced which dynamic system and state-variable are most suitable to be used as randomness source within the robotic exploration methods. All positions of the mobile robot are generated by the state-variable of the chaotic dynamic system and the inverse Jacobian of the mobile robot is used as control law. The position error at each point of the chaotic path is iteratively reduced and the angular velocities for each motion are computed. Numerical simulations were performed in the Matlab environment and illustrate the usefulness of the best collisionless chaotic path generator with the largest coverage, which can be applied to various areas, such as household, agriculture, education, manufacturing, patrolling, medical care, military and so on.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"102 ","pages":"Article 102372"},"PeriodicalIF":2.2,"publicationDate":"2025-01-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143146495","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Simulation of fractional order chaotic oscillators applying the Grünwald–Letnikov definition and the Adams–Bashforth–Moulton method

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-01-27 DOI: 10.1016/j.vlsi.2025.102366

Alejandro Silva-Juarez , Sergio A. Rosales-Nunez , Luis C. Alvarez-Simon , Gregorio Zamora-Mejia , Victor H. Carbajal-Gomez , Alejandro I. Bautista-Castillo , Jose M. Rocha-Perez

引用次数: 0

A broadband low-noise VCO circuit based on a hybrid analog-digital control loop

IF 2.2 3区工程技术

Integration-The Vlsi Journal Pub Date : 2025-01-27 DOI: 10.1016/j.vlsi.2025.102374

Lixia Zheng, Yuxiao Li, Zilu Zhao, Hehe Tian, Jin Wu, Weifeng Sun

引用次数: 0