Bingli Liu , Jiarong Wu , Liping Luo , Chunming Wen , Weilin Wu , Hailong Ma
{"title":"Cross-regulation characteristics of non-ideal single-inductor dual-output buck converter with voltage controlled","authors":"Bingli Liu , Jiarong Wu , Liping Luo , Chunming Wen , Weilin Wu , Hailong Ma","doi":"10.1016/j.vlsi.2025.102575","DOIUrl":null,"url":null,"abstract":"<div><div>Single-inductor multiple-output (SIMO) dc-dc converters are widely adopted in smart homes due to their high efficiency and small circuit volume. However, cross-regulation (CR) seriously influences the dynamic performance and the stability of SIMO dc-dc converters. In this paper, the CR characteristics of a non-ideal single-inductor dual-output (NI-SIDO) Buck converter with voltage control are analyzed, which includes parasitic resistors of the inductor and output capacitors. A nonlinear mathematical model and small-signal circuit are built, deducing the CR transfer functions and CR impedances. Therefore, the important factors affecting the CR are explored. Moreover, the CR characteristics are studied by the Bode plot under the common-mode voltage and differential-mode voltage control. The simulation results demonstrate that increasing the parasitic resistor of the inductor reduces the CR between the output branches. Furthermore, when the parasitic resistor of a branch output capacitor increases, the CR of the other output branch decreases accordingly. Finally, an experimental prototype is constructed to provide the correctness of the theoretical analysis.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"106 ","pages":"Article 102575"},"PeriodicalIF":2.5000,"publicationDate":"2025-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025002329","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
Single-inductor multiple-output (SIMO) dc-dc converters are widely adopted in smart homes due to their high efficiency and small circuit volume. However, cross-regulation (CR) seriously influences the dynamic performance and the stability of SIMO dc-dc converters. In this paper, the CR characteristics of a non-ideal single-inductor dual-output (NI-SIDO) Buck converter with voltage control are analyzed, which includes parasitic resistors of the inductor and output capacitors. A nonlinear mathematical model and small-signal circuit are built, deducing the CR transfer functions and CR impedances. Therefore, the important factors affecting the CR are explored. Moreover, the CR characteristics are studied by the Bode plot under the common-mode voltage and differential-mode voltage control. The simulation results demonstrate that increasing the parasitic resistor of the inductor reduces the CR between the output branches. Furthermore, when the parasitic resistor of a branch output capacitor increases, the CR of the other output branch decreases accordingly. Finally, an experimental prototype is constructed to provide the correctness of the theoretical analysis.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.