An analytical approach and fine-tuning strategy for PCB placement optimization

IF 2.5 3区工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Integration-The Vlsi Journal Pub Date : 2025-09-26 DOI:10.1016/j.vlsi.2025.102567

Hongyu Zhao, Yunhao Hu, Zhuomin Chai, Peng Wei, Shupei He, Wei Liu

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引用次数: 0

Abstract

As the foundation for connecting and supporting various electronic components, Printed Circuit Boards (PCBs) play an important role in modern electronic systems. The quality of PCBs physical design directly impacts the performance, reliability, and cost of the entire circuit. However, the automation of PCB physical design remains an issue that has not been fully resolved. In order to obtain high quality PCBs, component placement is the most important stage in an PCB design, and its result significantly influences both the wirelength and the overall routability of the design. Hence, we propose an analytical automated placement algorithm tailored for PCBs in this paper, including three stages: global placement, legalization, and fine-tuning. We perform an extensive study with 10 PCB designs and an open-source router. We show that the quality of our placement results is closer to that of manual. Compared to traditional algorithms, our analytical approach achieves higher routing completion rates and significantly reduces placement runtime.

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PCB布局优化的分析方法与微调策略

印刷电路板作为连接和支撑各种电子元件的基础，在现代电子系统中起着重要的作用。pcb物理设计的质量直接影响到整个电路的性能、可靠性和成本。然而，PCB物理设计的自动化仍然是一个尚未完全解决的问题。为了获得高质量的PCB，元件放置是PCB设计中最重要的阶段，其结果对设计的无线长度和整体可达性都有重大影响。因此，我们在本文中提出了一种针对pcb定制的分析自动放置算法，包括三个阶段：全局放置，合法化和微调。我们对10个PCB设计和一个开源路由器进行了广泛的研究。我们表明，我们的放置结果的质量更接近于人工。与传统算法相比，我们的分析方法实现了更高的路由完成率，并显著缩短了放置运行时间。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Integration-The Vlsi Journal 工程技术-工程：电子与电气

CiteScore

3.80

自引率

5.30%

发文量

107

审稿时长

6 months

期刊介绍： Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.