Thomas J. Ashby;Vincent Truffert;Dorin Cerbu;Kit Ausschnitt;Anne-Laure Charley;Wilfried Verachtert;Roel Wuyts
{"title":"Machine Learning on Multiplexed Optical Metrology Pattern Shift Response Targets to Predict Electrical Properties","authors":"Thomas J. Ashby;Vincent Truffert;Dorin Cerbu;Kit Ausschnitt;Anne-Laure Charley;Wilfried Verachtert;Roel Wuyts","doi":"10.1109/TSM.2023.3339330","DOIUrl":"https://doi.org/10.1109/TSM.2023.3339330","url":null,"abstract":"Doing high throughput high accuracy metrology in small geometries is challenging. One approach is to build easily measurable proxy targets onto dies and make a predictive model based on those signals. We use optical Pattern Shift Response (PSR) proxy targets to build predictive models of the electrical characteristics of devices in the Back End Of Line (BEOL). Given the wide choice of PSR targets, we explore how to select combinations of them to maximise the utility of the features for building an accurate Machine Learning (ML) model; we call this approach Multiplexed Optical Metrology. We also explore the trade-off between chip area dedicated to targets and achievable accuracy. We run ML experiments using different selections of targets measured at different stages of BEOL processing: post-lithography and post-Chemical-Mechanical-Planarisation (CMP). Our results show that a) reasonable predictive performance can be achieved for a reasonable area budget; b) ML model performance across target families varies significantly, thus justifying the need for careful selection of targets; c) longitudinal measurements of targets increases accuracy for no extra area penalty; d) increasing the number of targets gives some improvement in accuracy for a dataset of this size, but relatively small compared to the increase in area budget needed. Ultimately we aim to do die-level yield prediction using these techniques. We discuss how collecting a larger dataset with appropriate yield information is the logical next step to achieving this.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 1","pages":"46-58"},"PeriodicalIF":2.7,"publicationDate":"2023-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10342754","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139695064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jila Rafighdoost;Dmytro Kolenov;Silvania F. Pereira
{"title":"Coherent Fourier Scatterometry for Detection of Killer Defects on Silicon Carbide Samples","authors":"Jila Rafighdoost;Dmytro Kolenov;Silvania F. Pereira","doi":"10.1109/TSM.2023.3337720","DOIUrl":"10.1109/TSM.2023.3337720","url":null,"abstract":"It has been a widely growing interest in using silicon carbide (SiC) in high-power electronic devices. Yet, SiC wafers may contain killer defects that could reduce fabrication yield and make the device fall into unexpected failures. To prevent these failures from happening, it is very important to develop inspection tools that can detect, characterize and locate these defects in a non-invasive way. Current inspection techniques such as Dark Field or Bright field microscopy are effectively able to visualize most such defects; however, there are some scenarios where the inspection becomes problematic or almost impossible, such as when the defects are too small or have low contrast or if the defects lie deep into the substrate. Thus, an alternative method is needed to face these challenges. In this paper, we demonstrate the application of coherent Fourier scatterometry (CFS) as a complementary tool in addition to the conventional techniques to overcome different and problematic scenarios of killer defects inspection on SiC samples. Scanning electron microscopy (SEM) has been used to assess the same defects to validate the findings of CFS. Great consistency has been demonstrated in the comparison between the results obtained with CFS and SEM.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 1","pages":"124-128"},"PeriodicalIF":2.7,"publicationDate":"2023-11-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10335636","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139256281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Single-Mask Fabrication of Sharp SiOx Nanocones","authors":"Eric Herrmann;Xi Wang","doi":"10.1109/TSM.2023.3336169","DOIUrl":"https://doi.org/10.1109/TSM.2023.3336169","url":null,"abstract":"The patterning of silicon and silicon oxide nanocones onto the surfaces of devices introduces interesting phenomena such as anti-reflection and super-transmissivity. While silicon nanocone formation is well-documented, current techniques to fabricate silicon oxide nanocones either involve complex fabrication procedures, non-deterministic placement, or poor uniformity. Here, we introduce a single-mask dry etching procedure for the fabrication of sharp silicon oxide nanocones with smooth sidewalls and deterministic distribution using electron beam lithography. Silicon oxide films deposited using plasma-enhanced chemical vapor deposition are etched using a thin alumina hard mask of selectivity > 88, enabling high aspect ratio nanocones with smooth sidewalls and arbitrary distribution across the target substrate. We further introduce a novel multi-step dry etching technique to achieve ultra-sharp amorphous silicon oxide nanocones with tip diameters of ~10 nm. The processes presented in this work may have applications in the fabrication of amorphous nanocone arrays onto arbitrary substrates or as nanoscale probes.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 1","pages":"87-92"},"PeriodicalIF":2.7,"publicationDate":"2023-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139694968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Practical Reinforcement Learning for Adaptive Photolithography Scheduler in Mass Production","authors":"Eungjin Kim;Taehyung Kim;Dongcheol Lee;Hyeongook Kim;Sehwan Kim;Jaewon Kim;Woosub Kim;Eunzi Kim;Younggil Jin;Tae-Eog Lee","doi":"10.1109/TSM.2023.3336909","DOIUrl":"https://doi.org/10.1109/TSM.2023.3336909","url":null,"abstract":"This work introduces a practical reinforcement learning (RL) techniques to address the complex scheduling challenges in producing Active Matrix Organic Light Emitting Diode displays. Specifically, we focus on autonomous optimization of the photolithography process, a critical bottleneck in the fabrication. This provides an outperforming scheduling method compared with the existing rule-based approach which requires diverse rules and engineer experience on adapting dynamic environments. Our purposing RL network was designed to make effective schedules aligning with layered structures of the planning and scheduling modules for mass production. In the training phase, historical production data is utilized to create a representative discrete event simulation environment. The RL agent, based on the Deep Q-Network, undergoes episodic training to learn optimal scheduling policies. To ensure safe and reliable scheduling decisions, we further introduce action filters and parallel competing schedulers. The performance of RL-based Scheduler (RLS) is compared to the Rule-Based Scheduler (RBS) over actual fabrication in a year-long period. Based on key performance indicators, we validate the RLS outperforms the RBS, with a remarkable improvement in step target matching, reduced setup times, and enhanced lot assignments. This work also paves a way for the gradual integration of AI-based algorithms into smart manufacturing practices.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 1","pages":"16-26"},"PeriodicalIF":2.7,"publicationDate":"2023-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139695117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"GAGAN: Global Attention Generative Adversarial Networks for Semiconductor Advanced Process Control","authors":"Hsiu-Hui Hsiao;Kung-Jeng Wang","doi":"10.1109/TSM.2023.3332630","DOIUrl":"10.1109/TSM.2023.3332630","url":null,"abstract":"This paper addresses the quality control of the photolithography process in the semiconductor industry. Overlay errors in the process seriously affect the wafer yield, and cause the wafer to be forced to rework and affect the production efficiency of the equipment. We examine the current state of its process control, develop a novel overlay predict model, and verify the prediction results. This study proposes a Global Attention Generative Adversarial Networks (GAGAN) model to precisely predict the overlay error for the feed-forward data of the front layer, which is used as the important information and process parameters for the advanced process control of the current layer. Experiment results on a semiconductor shop-floor confirms that our proposed method achieves high predictive performance while maintaining extensibility and visual quality.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"37 1","pages":"115-123"},"PeriodicalIF":2.7,"publicationDate":"2023-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135709787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"2023 Index IEEE Transactions on Semiconductor Manufacturing Vol. 36","authors":"","doi":"10.1109/TSM.2023.3329863","DOIUrl":"10.1109/TSM.2023.3329863","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"36 4","pages":"677-693"},"PeriodicalIF":2.7,"publicationDate":"2023-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10312824","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135515206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"IEEE Transactions on Semiconductor Manufacturing Information for Authors","authors":"","doi":"10.1109/TSM.2023.3325126","DOIUrl":"https://doi.org/10.1109/TSM.2023.3325126","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"36 4","pages":"C3-C3"},"PeriodicalIF":2.7,"publicationDate":"2023-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"71903136","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Special Issue on Semiconductor Design for Manufacturing (DFM)","authors":"","doi":"10.1109/TSM.2023.3324270","DOIUrl":"https://doi.org/10.1109/TSM.2023.3324270","url":null,"abstract":"","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"36 4","pages":"676-676"},"PeriodicalIF":2.7,"publicationDate":"2023-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"71903144","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}