2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)最新文献_第3页

Novel Flexible True Random Number Generator Using Resistive Switching Memory 利用阻性开关存储器的新型柔性真随机数发生器

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665601

Heba Abunahla, K. Humood, B. Mohammad

引用次数: 1

Design and Application of a Novel 4-Transistor Chaotic Map with Robust Performance 具有鲁棒性能的新型4晶体管混沌映射的设计与应用

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665558

Maisha Sadia, P. Paul, Md Razuan Hossain, B. Muldrey, Md. Sakib Hasan

引用次数: 3

Neural Network Architecture Based on Wavelet Transform for Electro-mobility Detection 基于小波变换的电动汽车检测神经网络结构

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665612

Ching-Lung Su, W. Lai, Jun-Yao Zhong

引用次数: 0

Charge Scavenging Gate Coupled Hierarchical Bitline Scheme for Ultra-Low Power SRAMs in 65nm LSTP CMOS 65纳米LSTP CMOS超低功耗sram的电荷清除门耦合分层位线方案

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665552

Mukesh Kumar Srivastav, Rimjhim, Govind Soni, Umang Mittal, Rupali Tewari, Riya Yadav, Anuj Grover, Kedar Janardan Dhori, Harsh Rawat

引用次数: 1

A Low-Power Biasing Scheme for the Rail-to-Rail Buffer/Amplifier Applications 一种用于轨对轨缓冲/放大器的低功率偏置方案

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665458

U. Çini

引用次数: 0

Modeling Electrostatic MEMS Actuator 静电MEMS致动器建模

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665561

Z. Kolka, V. Biolková, D. Biolek, Zdeněk Biolek

引用次数: 4

Reduced Model Size Deep Convolutional Neural Networks for Small-Footprint Keyword Spotting 缩小模型尺寸的深度卷积神经网络用于小足迹关键字识别

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665618

Tsung-Han Tsai, XinAn Lin

引用次数: 3

Hybrid Detector with Interpixel Communication for Color X-ray Imaging 彩色x射线成像中具有像素间通信的混合探测器

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665489

P. Grybos, R. Kleczek, P. Kmon, A. Krzyzanowska, P. Otfinowski, R. Szczygiel, M. Zoladz

{"title":"Hybrid Detector with Interpixel Communication for Color X-ray Imaging","authors":"P. Grybos, R. Kleczek, P. Kmon, A. Krzyzanowska, P. Otfinowski, R. Szczygiel, M. Zoladz","doi":"10.1109/icecs53924.2021.9665489","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665489","url":null,"abstract":"This paper presents a readout integrated circuit of pixel architecture called MPIX (Multithreshold PIXels), designed for CdTe pixel detectors used in high-energy X-ray imaging applications. The MPIX IC of the area of $9.6 text{mm} times 20.3 text{mm}$ is designed in a CMOS 130 nm process. The IC core is a matrix of $96times 192$ square-shaped pixels of $100 mu mathrm{m}$ pitch. Each pixel contains an analog front-end, four independently working discriminators, and four 12-bit ripple counters. Such pixel architecture allows photon processing one by one and selecting the X-ray photons according to their energy (X-ray color imaging). The MPIX chips are bump-bonded to pixel CdTe sensor with a pitch of $100 mu mathrm{m}$ and thickness of $750 mu mathrm{m}$. These hybrid detectors (sensor bump-bonded to readout integrated circuit) are characterized by test pulses and X-ray radiation. To match the different range of applications the MPIX chip has 8 possible different gain settings. In the high gain mode, the chip can operate with Xray photons up to 46 keV and has the Equivalent Noise Charge (ENC) of 123 el. rms. In the low gain mode, the ENC is equal to 192 el. rms, and the chip can process the X-ray photons of energy up to 154 keV. The matrix of 18432 pixels has a very good uniformity: globally set threshold has an effective pixel to pixel offset spread of 1 mV (for the full threshold range up to 800 mV). The power consumption per pixel is $80 mu mathrm{W}/text{pixel}$. Additionally, to deal with charge sharing effects in a thick semiconductor pixel sensor, Multithreshold Pattern Recognition algorithms are implemented in the MPIX IC.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121392474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

FiltPIM: In-Memory Filter for DNA Sequencing FiltPIM:用于DNA测序的内存过滤器

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/ICECS53924.2021.9665570

Marcel Khalifa, Rotem Ben Hur, R. Ronen, Orian Leitersdorf, L. Yavits, Shahar Kvatinsky

引用次数: 9

Efficient Sequence Generation for Hardware Verification Using Machine Learning 基于机器学习的硬件验证高效序列生成

2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2021-11-28 DOI: 10.1109/icecs53924.2021.9665495

Muhammad Gad, Mostafa AboelMaged, M. Mashaly, M. A. E. Ghany

{"title":"Efficient Sequence Generation for Hardware Verification Using Machine Learning","authors":"Muhammad Gad, Mostafa AboelMaged, M. Mashaly, M. A. E. Ghany","doi":"10.1109/icecs53924.2021.9665495","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665495","url":null,"abstract":"With the doubling in the number of transistors approximately every two years, modern systems' complexity is growing exponentially. As the complexity of systems increases, the amounts of data generated during functional verification becomes huge. Debugging this huge amount of data becomes very time-consuming and a bottleneck in the design flow. Thus, comes the importance of using machine learning in verification to analyze this huge amount of data, automate and accelerate the process of verification. In this paper, two methods for improving sequential circuits' simulation-based verification techniques are presented. First, a graph-based method with adaptive neural network is proposed. The proposed method overcomes the problem of sensitivity of learning algorithms to the size and quality of the initial training set. Simulations show that the proposed method always achieves full coverage closure irrespective of the initial training set while the other methods quality decreases drastically with decreasing training set size. For the second method, a new way of choosing graph weights is proposed. Results show that new graph weights introduce at least 10% improvement in total number of instructions and 40% improvement in total time.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125135293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1