Toshiyuki Inoue, A. Tsuchiya, K. Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura
{"title":"A Burst-Mode TIA with Adaptive Response and Stable Operation for in-Vehicle Optical Networks","authors":"Toshiyuki Inoue, A. Tsuchiya, K. Kishine, Daisuke Ito, Yasuhiro Takahashi, Makoto Nakamura","doi":"10.1109/icecs53924.2021.9665522","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665522","url":null,"abstract":"In-vehicle optical network systems have been studied eagerly for realizing self-driving cars. To provide a stable operation of the optical receiver in the system, we propose an appropriate-time-constant control circuit for a burst-mode transimpedance amplifier (TIA) which provides adaptive response in single-ended to differential conversion circuit in accordance with input-data patterns. We present operating principles, the design procedures, and the post-layout simulation results of the proposed circuit in 65-nm CMOS process. We verify the fast response within 4 ns and the high tolerance to consecutive identical digit length of 66 bits in the proposed circuit.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"469 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123055937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Evaluation of a Filter-less AD-PLL with a Wide Input Frequency Range Using a Fast-Locking Algorithm","authors":"R. Robles, T. Harada, Michio Yokoyama","doi":"10.1109/icecs53924.2021.9665560","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665560","url":null,"abstract":"In this paper a Simulink model for a Filter-less All-digital Phase Locked Loop with a wide input frequency range and a fast-locking algorithm is presented. It was desirable to test the design's stability using different reference signals that covered a wide frequency range, specifically a 32.768kHz (RTC) reference and a 1MHz reference signal. The method for modeling and simulating the circuit is explained and then tested by observing the system's performance according to Simulink. The model was validated by comparing its lock time and jitter behavior against the Hspice design of the system for a 1MHz input reference. It was found that this filter-less AD-PLL system can be used at least with two of the most common crystal frequencies, RTC and 1MHz, which makes it highly compatible with IoT systems where a frequency synthesizer is required. The system locked onto the reference signal within 8 and 30 clock periods for a 1MHz reference, with an average of 19.2 clock periods, and within 6 and 48 clock periods for a RTC reference, with an average of 21.9 clock periods, across all configurations of the frequency divider in the feedback path, with jitter under 2.21% in all cases.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115630978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
I. Oliveira, Dennis Latoschewski, C. Wiede, M. Oettmeier, David Graurock, D. Kolossa
{"title":"Embedded acoustic fault monitoring for water pumps","authors":"I. Oliveira, Dennis Latoschewski, C. Wiede, M. Oettmeier, David Graurock, D. Kolossa","doi":"10.1109/icecs53924.2021.9665616","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665616","url":null,"abstract":"Maintaining pumps, especially waste water pumps, is quite a cost-intensive task. The proper operation must be guaranteed under all circumstances. Accessing the pumps, however, is not easily done, as they are submerged in waste water. This paper describes the development of a fault classification system based on acoustic signals, with the focus on finding an optimal feature space and an efficient classifier in terms of energy and memory footprint. Those characteristics are especially important when the classifier has to run on a resource-constrained platform like an embedded system. In this paper, we show how the combination of a dimensionality reduction and a feature selection can be used to reduce the memory footprint of the entire system by 79%, with no significant loss in test set accuracy. With this strategy, a neural network with thirty input features was deployed on an embedded system with a memory footprint for the classification parameters of only 22.94 kB.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129120593","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Farrugia, Barnaby Portelli, I. Grech, J. Micallef, O. Casha, E. Gatt
{"title":"A Compact Near-Infrared Spectrometer based on an FR4 Electromagnetic Scanning Grating","authors":"R. Farrugia, Barnaby Portelli, I. Grech, J. Micallef, O. Casha, E. Gatt","doi":"10.1109/icecs53924.2021.9665579","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665579","url":null,"abstract":"A novel small-scale near-infrared spectrometer based on an FR4-based scanning grating is presented. The design concept consists of a single FR4 printed circuit board ($110 text{mm} times 76.5 text{mm}$) that integrates the entrance slit, exit slit, photodetector, scanning grating and all interfacing circuitry for scanner drive and sensor readout. The scanning grating consists of an aluminium-coated glass grating assembled on an FR4 square plate and is operated at resonance via electromagnetic actuation. The spectrometer design concept significantly facilitates alignment during product assembly and results in fewer parts. The spectrometer achieves a spectral range of 1210 nm to 2170 nm and an estimated spectral resolution of 10 nm using a single photodetector. The proposed optical configuration and the use of a single photodetector contribute towards a low-cost solution relative to the state-of-the-art. Moreover, superior scanning efficiency (0.13 degrees/mA) together with low power consumption (30 mW) and low operating frequency (190 Hz) are demonstrated with the FR4-based micro-scanner with an integrated diffraction grating.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"C-23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126476697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Solar sensor for Cubesat attitude determination","authors":"Y. Nurgizat, G. Balbayev, D. Galayko","doi":"10.1109/icecs53924.2021.9665513","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665513","url":null,"abstract":"This article addresses a design and implementation of sun sensor for the attitude determination system of a nanosatellite. The purpose of the sun sensor is a determination of the coordonnees of the “satellite-sun” vector in the reference frame attached to the satellite. This is done by processing the photovoltaic signals issued from the solar sensors placed on the 6 sides of the satellite. The article presents a mathematical model of the sensor, the characteristics of the chosen solar panels, the methodology of calibration and details of the hardware and software implementation. The operability of the system is validated by a laboratory experiment, whose methodology is presented in details. The proposed algorithm of the sun sensor addresses the processing of the Earth albedo and the self-calibration aspects.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125902484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Comparative study of usefulness of FeFET, FTJ and ReRAM technology for ternary arithmetic","authors":"D. Fey, J. Reuben, S. Slesazeck","doi":"10.1109/icecs53924.2021.9665635","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665635","url":null,"abstract":"From a computer architecture and arithmetic perspective, one of the most attractive features of non-volatile memory technologies and memristive devices is their ability to store multiple bits in a single physical memory cell. Moreover, this offers the possibility not only to store data, but also to become an inherent part of a computational process in terms of an in-memory computing concept. The paper presents results of a concept study in which different memristive and also non-memristive non-volatile devices, namely Resistive RAMs (ReRAMs) and Ferroelectric Field-effect transistors (FeFETs), are comparatively evaluated with respect to their suitability to realise ternary logic operations for building fast and low-power adders using mixed-signal circuits. Such adder structures can provide the arithmetic basis for future embedded low-power AI.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130450967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Comparator Speed Enhancement Technique for Near- and Sub-Threshold ADCs","authors":"Bojun Hu, Sanfeng Zhang, Xiong Zhou, Zehao Li, Xiangxin Pan, Zhaoming Ding, Qiang Li","doi":"10.1109/icecs53924.2021.9665467","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665467","url":null,"abstract":"This paper presents a comparator speed enhancement technique for successive approximation register (SAR) analog-to-digital converter (ADC) under near- and sub-threshold supply voltages. The proposed delayed cross-coupling comparator effectively improves the speed of the comparator while maintaining a good noise performance. This work has been proved by a 350mV 8bit 12MS/s SAR ADC designed in a 65nm CMOS technology. The post-layout simulation shows that the ADC achieves SNDR of 48.83dB and SFDR of 63.72dB. The overall power consumption is $6.71mu mathrm{W}$, resulting in a figure-of-merit (FoM) of 2.47 fJ/convertion-step. The simulation results present that the proposed comparator speed enhancement technique significantly improves the sampling rate of the ADC under near- and sub-threshold supply voltages.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134115938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Time-Multiplexed Flash ADC for Deep Neural Network Analog in-Memory Computing","authors":"A. Boni, Francesco Frattini, Michele Caselli","doi":"10.1109/icecs53924.2021.9665494","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665494","url":null,"abstract":"This paper presents a Flash A/D converter to be integrated at the periphery of mixed-signal computing memories for convolutional neural networks. We investigate the feasibility of a true time-multiplexing, which allows to greatly relax the ADC requirements of area and aspect ratio, without sacrificing the data throughput of the memory array. The ADC, based on a strong-arm latched comparator combining built-in reference generation, body bias, and offset calibration, exhibits 29.8-dB SNDR at 3.2 GS/s with 1.5-mW power consumption, and a silicon area of $900 mumathrm{m}^{2}$. Integrated with the memory array, the converter enables up to 32-to-1 column multiplexing with 20 ns of A/D conversion latency.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134150764","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modeling of Memcapacitor with Anelastic Dielectric via Two-Port Capacitor","authors":"Zdeněk Biolek, V. Biolková, D. Biolek, Z. Kolka","doi":"10.1109/icecs53924.2021.9665599","DOIUrl":"https://doi.org/10.1109/icecs53924.2021.9665599","url":null,"abstract":"A methodology of modeling hybrid, particularly electromechanical systems, exhibiting the behavior of generic memcapacitors, is demonstrated via the example of a capacitor with anelastic dielectric. The model contains one-port elements from Chua's table of fundamental elements, and a two-port capacitor with one electric and one mechanical port. The electric port serves as a memcapacitor charge-voltage port, and the variables of the mechanical port are the deflection of the dielectric and the electrostatic force causing this deflection. It is shown that this two-port capacitor is a reciprocal element whose state function is the energy of electrostatic field of the memcapacitor. A circuit, governing the memcapacitor dynamics, which is given by the state equation, is connected to the mechanical port. The model behavior is studied via computer simulation.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"284 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132692887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ismail Ryad, Marwan Zidan, Nadien Rashad, Dina Bakr, Nadeen Bakr, Nada Yehia, Yara Ismail, Mohamed Abdelsalam, Ashraf Salem
{"title":"Using Path Planning Algorithms and Digital Twin Simulators to Collect Synthetic Training Dataset for Drone Autonomous Navigation","authors":"Ismail Ryad, Marwan Zidan, Nadien Rashad, Dina Bakr, Nadeen Bakr, Nada Yehia, Yara Ismail, Mohamed Abdelsalam, Ashraf Salem","doi":"10.1109/ICECS53924.2021.9665583","DOIUrl":"https://doi.org/10.1109/ICECS53924.2021.9665583","url":null,"abstract":"There is a major challenge in collecting real-world data for training the AI Agents of self-driving Cars, Drones, and Automated Guided Vehicles (AGVs). The process is slow and expensive, since the data must be reprocessed and correctly labeled before use. Furthermore, it is difficult to collect data for corner cases, especially dangerous scenarios that lead to accidents. Another challenge is the distribution of data that we use to train the model to guarantee optimal results without fitting problems or training with meaningless or redundant data. In this paper, we present a novel methodology to use path planning algorithms to generate and label the dataset needed for training AI agents. Our methodology is demonstrated with A* path planning algorithm and Microsoft Airsim Drone Simulator, which eases the obtainment of the required data for creating the obstacles grid and provides the tools needed for simulating the drone's movement.","PeriodicalId":448558,"journal":{"name":"2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-11-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132693931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}