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2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)最新文献

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Investigating the global trend of semiconductor industry by reviewing the digital-analog converters 通过对数模转换器的回顾，了解全球半导体工业的发展趋势
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713766
Bing Han, A. Matsuzawa, Jianguo Ma
{"title":"Investigating the global trend of semiconductor industry by reviewing the digital-analog converters","authors":"Bing Han, A. Matsuzawa, Jianguo Ma","doi":"10.1109/EDSSC.2010.5713766","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713766","url":null,"abstract":"DAC (digital-analog converter) is widely used in mixed-signal system and is also the typical integrated circuit device in semiconductor products. The statistical analysis on DAC papers and semiconductor market show that science and technology promote market rising prosperity and market demands expedite progress and innovation of scientific and technological. Now the research on DAC and the semiconductor market development in Asia-Pacific are gradually becoming more prominent, showing the globalization trend of semiconductor industry.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116659631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A subthreshold SRAM cell tolerant to random dopant fluctuations 耐受随机掺杂波动的亚阈值SRAM单元
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713673
Amir Reza Ahmadi Mehr, Iman Madadi, A. Afzali-Kusha
{"title":"A subthreshold SRAM cell tolerant to random dopant fluctuations","authors":"Amir Reza Ahmadi Mehr, Iman Madadi, A. Afzali-Kusha","doi":"10.1109/EDSSC.2010.5713673","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713673","url":null,"abstract":"In this paper, we propose a subthreshold SRAM cell tolerant to random dopant fluctuations. The proposed 12T structure has a lower power consumption and larger write and read SNMs. In addition, the read operation is performed differentially at a high read current. The improvements are obtained at the cost of additional area. In addition, the proposed cell adds one junction capacitance per cell to the bitlines. Using SOI/FINFET structures the added capacitance may be minimized. To evaluate the efficiency of the proposed cell structure, several parameters of SRAM and their variations under random dopant fluctuations are studied. In the study, different subthreshold SRAM structures are implemented and compared using a 32nm standard bulk MOSFET technology.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121492411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Extraction of gate oxide quality and its correlation to the electrical parameters of MOS devices 栅极氧化物质量的提取及其与MOS器件电学参数的关系
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713676
R. Ortega, J. Molina, A. Torres, M. Landa, P. Alarcon, M. Escobar
{"title":"Extraction of gate oxide quality and its correlation to the electrical parameters of MOS devices","authors":"R. Ortega, J. Molina, A. Torres, M. Landa, P. Alarcon, M. Escobar","doi":"10.1109/EDSSC.2010.5713676","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713676","url":null,"abstract":"Physical, chemical and electrical measurements are a useful tool to determine some of the most important parameters in MOS devices. Electrical and structural properties of MOS devices can be obtained from these measurements. Main chemical bonds and thickness of gate oxide, threshold voltage, flatband voltage, series resistance and channel length for MOS devices are some of the parameters that can be obtained by these measurements. MOS capacitors and MOSFET devices with a CMOS standard fabrication process in INAOE were measured. Stress voltage was applied in MOS devices to extract lifetime characteristics and therefore, their reliability. The results showed to have a high correlation with manufacturing specifications.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131913963","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Simple compact model for hot carrier injection phenomenon in 32 nm NAND flash memory device 32nm NAND闪存器件热载流子注入现象的简单紧凑模型
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713695
Myounggon Kang, Wook-Ghee Hahn, I. Park, Hocheol Lee, Juyoung Park, Youngsun Song, Changgyu Eun, Sanghyun Ju, Kihwan Choi, Y. Lim, Jong-Ho Lee, Byung-Gook Park, Hyungcheol Shin
{"title":"A Simple compact model for hot carrier injection phenomenon in 32 nm NAND flash memory device","authors":"Myounggon Kang, Wook-Ghee Hahn, I. Park, Hocheol Lee, Juyoung Park, Youngsun Song, Changgyu Eun, Sanghyun Ju, Kihwan Choi, Y. Lim, Jong-Ho Lee, Byung-Gook Park, Hyungcheol Shin","doi":"10.1109/EDSSC.2010.5713695","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713695","url":null,"abstract":"In this work, a SPICE-friendly hot carrier injection (HCI) model for NAND flash memory has been proposed. By applying the HCI model to the 32 nm NAND product, the simulation based on HCI model showed good agreement with the measurement results. Based on the proposed model, a complex problem regarding the program disturbance in the scaled NAND flash memory array can be predicted through simple circuit simulations. Moreover, it is very useful in developing the ultra-short channel devices for high density multi-level cell (MLC) NAND flash technologies.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115355879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Bipolar switching analysis and negative resistance phenomenon in TiOx-based devices tiox基器件的双极开关分析及负电阻现象
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713758
Linkai Wang, Ze Jia, T. Ren
{"title":"Bipolar switching analysis and negative resistance phenomenon in TiOx-based devices","authors":"Linkai Wang, Ze Jia, T. Ren","doi":"10.1109/EDSSC.2010.5713758","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713758","url":null,"abstract":"This work addresses the negative resistance phenomenon in TiOx-based resistive-switching cells applied in RRAM. The switching behavior of the Ag (or Pt, top)/TiOx/Pt (bottom) structure was also carefully analyzed. The negative resistance phenomenon and switching behavior can be modeled to space-charge-limited conduction (SCLC) mechanism with asymmetric electron trapping centers. A two-variable model based on SCLC is also proposed.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116718995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A novel approach to simulate Fin-width Line Edge Roughness effect of FinFET performance 一种模拟鳍宽线边缘粗糙度对FinFET性能影响的新方法
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713678
Xinjie Guo, Shaodi Wang, Chenyue Ma, Chenfei Zhang, Xinnan Lin, Wen Wu, F. He, Wenping Wang, Zhiwei Liu, Wei Zhao, Shengqi Yang
{"title":"A novel approach to simulate Fin-width Line Edge Roughness effect of FinFET performance","authors":"Xinjie Guo, Shaodi Wang, Chenyue Ma, Chenfei Zhang, Xinnan Lin, Wen Wu, F. He, Wenping Wang, Zhiwei Liu, Wei Zhao, Shengqi Yang","doi":"10.1109/EDSSC.2010.5713678","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713678","url":null,"abstract":"This paper developed a full three-dimensional (3-D) statistical simulation approach to investigate Fin-width Line Edge Roughness (LER) effect on the FinFETs performance. The line edge roughness is introduced by Matlab program, and then the intrinsic parameter fluctuations at fixed LER parameters are studied in carefully designed simulation experiments. The result shows that Fin-width LER causes a dramatic shift and fluctuations in threshold voltage. The simulation results also imply that the velocity saturation effect may come into effect even under low drain voltage due to LER effect.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115124918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Audio susceptibility aware ramp signal design on feedforward voltage-mode CCM buck converter 前馈电压型CCM降压变换器音频敏感斜坡信号设计
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713773
Edward N. Y. Ho, P. Mok
{"title":"Audio susceptibility aware ramp signal design on feedforward voltage-mode CCM buck converter","authors":"Edward N. Y. Ho, P. Mok","doi":"10.1109/EDSSC.2010.5713773","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713773","url":null,"abstract":"This paper compares the effect on audio susceptibility with different implementations on the linear ramp signal in voltage-mode continuous-conduction-mode buck converter. Time domain charge-based analysis has been performed to justify the advantage of different approaches in different duty ratios. Transistor level simulations have been performed using a standard 0.35µm CMOS process to verify the results.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122982263","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A MEMS-based flexible electrode array using composite substrate 一种基于mems的复合衬底柔性电极阵列
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713778
T. Ren, B. Yan, Jian-Hui Lin, Xiaoming Wu, Li-gang Wang, Yi Yang, Li-tian Liu
{"title":"A MEMS-based flexible electrode array using composite substrate","authors":"T. Ren, B. Yan, Jian-Hui Lin, Xiaoming Wu, Li-gang Wang, Yi Yang, Li-tian Liu","doi":"10.1109/EDSSC.2010.5713778","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713778","url":null,"abstract":"We present a MEMS-based flexible subdural electrode array for neural recordings. The electrode array is fabricated on a composite substrate of polyimide and biomedical-grade polydimethylsiloxane(PDMS). The electrodes are deposited on polyimide layer, and the whole device is packaged by PDMS. Ablating with a CO2 laser is applied to expose the electrodes sites. The surface of the electrodes is modified to increase the surface area, which can decrease interface impedance by nearly 90%. Prototypes of 2×4 and 2×1 arrays are fabricated with exposed electrode diameters of 0.5mm and 2.3mm respectively. After full package, the whole thickness of the electrode array is 0.7mm. For the 2×4 array, the average electrode impedance is 18.9 kΩ for normal 0.5mm electrodes and only 1.58kΩ for surface modified 0.5mm electrodes. The 2×1 array was successfully subdural implanted into a rabbit's brain, and get its electro-corticogram(ECoG).","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128859005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Body bias effect of GaN schottky barrier MOSFET with ITO source/drain ITO源极/漏极GaN肖特基势垒MOSFET的体偏效应
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713729
Chang-Ju Lee, Tae-Hyeon Kim, Dong‐Seok Kim, S. Sung, B. Jung, Y. Heo, Jung-Hee Lee, S. Hahm
{"title":"Body bias effect of GaN schottky barrier MOSFET with ITO source/drain","authors":"Chang-Ju Lee, Tae-Hyeon Kim, Dong‐Seok Kim, S. Sung, B. Jung, Y. Heo, Jung-Hee Lee, S. Hahm","doi":"10.1109/EDSSC.2010.5713729","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713729","url":null,"abstract":"We fabricated GaN SB-MOSFET using the ITO source/drain and gate with very high drain current and low threshold voltage. Furthermore, we tried to check the body bias effect of the GaN SB-MOSFET after forming the ohmic contact to the substrate. We could control threshold voltage by body bias that makes the device more useful. It is applicable to many of electric circuit applications such as logic gate, memory cell transistors, and image sensors, which are potential area for digital GaN UV optoelectronics.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"182 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116334900","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The variations of osillation freqeuncy according to the oscillation amplitudes in DCO 在DCO中振荡频率随振荡幅度的变化
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713724
Sang-Sun Yoo, Jeong-Ho Park, Hong-Joo Song, Hyung-Joun Yoo
{"title":"The variations of osillation freqeuncy according to the oscillation amplitudes in DCO","authors":"Sang-Sun Yoo, Jeong-Ho Park, Hong-Joo Song, Hyung-Joun Yoo","doi":"10.1109/EDSSC.2010.5713724","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713724","url":null,"abstract":"In DCO, oscillation frequency can be continuously changed by large oscillation amplitudes. The effect of oscillation amplitude is valid for any oscillator with steep C-V characteristic. The effect is critical in DCO because it needs very small capacitance control. For verifying the oscillation effect, an opposite-coupled pair in DCO with oscillation amplitude and a separated opposite-coupled pair are measured, respectively. As the result, the polarity of unit tuning frequency can be even inverted at large oscillation amplitude. Although capacitance is increased by control voltage in the separated pair, the oscillation frequency of DCO is increased, which differs from an expectation. This means that the effective capacitance of DCO is decreased by oscillation amplitude. This paper analyzes this effect and explains it with the effective capacitance.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130966129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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