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2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)最新文献

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Double edge-triggered half-static clock-gated D-type flip-flop 双边缘触发半静态时钟门控d型触发器
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713786
Wing-Shan Tam, S. Siu, C. Kok, H. Wong
{"title":"Double edge-triggered half-static clock-gated D-type flip-flop","authors":"Wing-Shan Tam, S. Siu, C. Kok, H. Wong","doi":"10.1109/EDSSC.2010.5713786","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713786","url":null,"abstract":"This paper proposes a double edge-triggered half-static clock-gated D-type flip-flop (DHSCGFF), which consists of two parallel dynamic master latches connected in parallel and a single half-static latch with clock-gating circuit. The proposed DHSCGFF makes use of a clock-gating circuit to achieve better race tolerance, circuit compactness and energy efficiency without the use of pulse generator. Simulation results of the proposed circuit using a 0.18 µm technology is presented. Results indicate that the proposed circuit can achieve a 4 Gbits/sec data rate and a 96% redundant power reduction.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131586159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Magnetic coupling calculations using partial inductance theory 用偏电感理论计算磁耦合
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713785
Y. Zhang, N. Fong, A. Choi, N. Wong
{"title":"Magnetic coupling calculations using partial inductance theory","authors":"Y. Zhang, N. Fong, A. Choi, N. Wong","doi":"10.1109/EDSSC.2010.5713785","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713785","url":null,"abstract":"Quantitative analysis of magnetic coupling problems involves the calculations of self inductance of conductors, mutual inductance between conductors, and inductive coupling coefficient etc. It is an issue of great interest along the whole electromagnetics evolvement history. Formerly, the calculations have to be carried out with the aid of three-dimentional EDA solvers by discretization of the entire volume. This is rather tedious and computationally expensive. Engineers may need a simple approach to estimate the inductance values without any complex computational tools. In this paper, we propose a new method to fulfill this task based on partial inductance theory. An example with the procedure to calculate coupling coefficient of two magnetic resonant coils is presented.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":" 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131893444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Miniaturized microwave bandpass filter based on modified hairpin topology 基于改进发夹拓扑的小型化微波带通滤波器
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713723
K. Srisathit, J. Tangjit, W. Surakampontorn
{"title":"Miniaturized microwave bandpass filter based on modified hairpin topology","authors":"K. Srisathit, J. Tangjit, W. Surakampontorn","doi":"10.1109/EDSSC.2010.5713723","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713723","url":null,"abstract":"This paper presents a microstrip hairpin bandpass filter (BPF) with simultaneously compact size and harmonic suppression. With the use of a square groove technique, the phase velocities between even- and odd-mode in parallel-coupled line segment are compensated. Two prototype filters based on the conventional hairpin and the proposed hairpin BPF are designed at the center frequency of 2.45 GHz with a fractional bandwidth of 20 percentages and fabricated on the microstrip structure. The proposed BPF exhibits the measured insertion loss of 1.2 dB at the centered frequency of 2.49 GHz, whereas the in-band return loss is kept below 12 dB from 2.21 to 2.7 GHz. Good agreements between the simulation and measurement can be obtained.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133306601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Electrical properties of HfTiO gate-dielectric metal oxide semiconductor capacitors with NO and N2O surface nitridations 表面氮化NO和N2O的HfTiO栅极-介电金属氧化物半导体电容器的电学性能
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713759
F. Ji, J. Xu, C. X. Li, P. Lai, L. Deng, X. Zou
{"title":"Electrical properties of HfTiO gate-dielectric metal oxide semiconductor capacitors with NO and N2O surface nitridations","authors":"F. Ji, J. Xu, C. X. Li, P. Lai, L. Deng, X. Zou","doi":"10.1109/EDSSC.2010.5713759","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713759","url":null,"abstract":"In this paper, Si-MOS capacitors with HfTiO/SiON stack gate dielectric were fabricated by using Si-surface thermal passivation in NO and N2O ambients respectively and reactive co-sputtering technology. Results show that the sample pretreated in NO ambient has excellent interface properties, low gate leakage current density and high reliability. This is attributed to the formation of a SiON interlayer with suitable proportion of N and O, and N-barrier role of isolating Ti in HfTiO from Si of the substrate, thus effectively preventing the inter-diffusions of Ti and Si during post-deposition annealing.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132320053","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Low gain-error instrumentation amplifier for current sensing 用于电流传感的低增益误差仪表放大器
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713692
Jiongming Wang, Fuding Ge, Shengqi Yang, Xinnan Lin, Jin He
{"title":"Low gain-error instrumentation amplifier for current sensing","authors":"Jiongming Wang, Fuding Ge, Shengqi Yang, Xinnan Lin, Jin He","doi":"10.1109/EDSSC.2010.5713692","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713692","url":null,"abstract":"This paper presents the design of a low gain-error pseudo rail-to-rail indirect current feedback instrumentation amplifier (In-Amp). In order to reduce the gain error introduced by the input common mode voltage variations, MOS transconductors regulated by specially designed folded-cascoded amplifier are used. Simulated gain error is only about 0.2% with input common mode voltage ranging from half VDD to VDD.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122380232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A high breakdown voltage and low switching loss GaN schottky diode using CHF3 plasma treatment 采用CHF3等离子体处理的高击穿电压和低开关损耗GaN肖特基二极管
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713710
Sheng-Wen Peng, Chih-Wei Yang, Chao-Hung Cheng, Che-Kai Lin, H. Chiu
{"title":"A high breakdown voltage and low switching loss GaN schottky diode using CHF3 plasma treatment","authors":"Sheng-Wen Peng, Chih-Wei Yang, Chao-Hung Cheng, Che-Kai Lin, H. Chiu","doi":"10.1109/EDSSC.2010.5713710","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713710","url":null,"abstract":"In this study, the circular Schottky diodes fabricated on a standard AlGaN/GaN epitaxial wafer with fluorine ions plasma CF<inf>4</inf> and CHF<inf>3</inf> treatment technology were proposed. The Schottky diode with 60sec CHF<inf>3</inf> plasma treated exhibits a high breakdown voltage of −352V, and a low reverse leakage current of 10<sup>−7</sup>A. It also presented low switching loss and high stability. According the outstanding performance, we proposed circular Schottky diode with CHF<inf>3</inf> plasma treated was promising in converter circuit applications.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122530327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A CMOS inverter-based class-AB pseudo differential amplifier for HF applications 一种基于CMOS逆变器的高频ab类伪差分放大器
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713694
A. Suadet, V. Kasemsuwan
{"title":"A CMOS inverter-based class-AB pseudo differential amplifier for HF applications","authors":"A. Suadet, V. Kasemsuwan","doi":"10.1109/EDSSC.2010.5713694","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713694","url":null,"abstract":"This paper presents a CMOS inverter-based class-AB pseudo differential amplifier for HF applications using new simple rail-to-rail CMFB circuit. The proposed circuit employs two CMOS inverters and the complementary common-mode feedback (CMFB) consisting of current mode common-mode detector and transimpedance amplifiers. The circuit has been designed using 0.18 µm CMOS technology under 1 V supply, and the simulation results shows that the rail to rail output swing is achieved with low common-mode gain (−15 dB). The output swing of the circuit is 0.7 V. The power dissipation of the circuit is 96 µW.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129363100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Improvements of Fermi-level pinning and NBTI by fluorinated HfO2-CMOS 氟化HfO2-CMOS对费米能级钉钉和NBTI的改进
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713757
Chao‐Sung Lai, Woei-Cherng Wu, Huai-Hsien Chiu, J. Wang, P. Chou, T. Chao
{"title":"Improvements of Fermi-level pinning and NBTI by fluorinated HfO2-CMOS","authors":"Chao‐Sung Lai, Woei-Cherng Wu, Huai-Hsien Chiu, J. Wang, P. Chou, T. Chao","doi":"10.1109/EDSSC.2010.5713757","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713757","url":null,"abstract":"Improvement of Fermi-level pinning (FLP) and relaxation of negative-bias-temperature-instability (NBTI) for CMOS without interfacial layers was achieved by fluorine incorporation into HfO2. The driving current capability was increased up to 48% and 45% for n-MOSFET and p-MOSFET, respectively. It's caused by the oxygen vacancy was blocked by the fluorine incorporated interface and resulted in the suppression of the interfacial oxide growth to achieved thinner effective oxide thickness (EOT). The improvement included the Fermi-level pinning shift from ∼0.1eV to ∼0.02eV for samples without and with fluorination, respectively. Vth shifts under NBTI stressing were relaxed from positive 350mv to negative 270mv for control and fluorinated samples, respectively. It is due to the Si-F bondings broken under NBTI stressing which the released-fluorine re-incorporate to passivate the HfO2 bulk.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114832265","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A low-voltage charge pump with wide current driving capability 具有宽电流驱动能力的低压电荷泵
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713777
O. Wong, Wing-Shan Tam, C. Kok, H. Wong
{"title":"A low-voltage charge pump with wide current driving capability","authors":"O. Wong, Wing-Shan Tam, C. Kok, H. Wong","doi":"10.1109/EDSSC.2010.5713777","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713777","url":null,"abstract":"A high current driving capability charge pump circuit is proposed. By adopting the dynamic boosting circuit, the overdrive voltages of all the charge transfer switches (CTS's) in the charge pump are maintained for a large loading current. In addition, the largest voltage difference between any of the terminals of all the transistors does not exceed the supply voltage VDD, and solves the gate-oxide overstress problem in the conventional charge pump circuits and enhances the reliability. Other advantages of the proposed charge pump include high pumping efficiency because of no threshold voltage drop and 2-phase operation, without the need of extra power consumption on the logic circuits and drivers. The proposed charge pump circuit is designed and simulated based on a low voltage process. Results show that the charge pump can operate in a wide output current range.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"128 7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127127706","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Improved multi-loop SMASH sigma-delta modulator for wideband applications 用于宽带应用的改进多环路SMASH sigma-delta调制器
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713721
Hongyi Li, Y. Wang, S. Jia, Xing Zhang
{"title":"Improved multi-loop SMASH sigma-delta modulator for wideband applications","authors":"Hongyi Li, Y. Wang, S. Jia, Xing Zhang","doi":"10.1109/EDSSC.2010.5713721","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713721","url":null,"abstract":"In this paper, a novel design method has been proposed to realize feed-forward low-distortion unity STF sigma-delta modulators which are the critical blocks in multi-loop SMASH structure. Using the method, a timing-relaxed stable unity STF 2nd-order modulator has been proposed in detail. After that, an extremely high-resolution SMASH 2(3b)-2(3b)-1(2b) has been suggested using the proposed stages. Extensive results prove the efficiency of this topology.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121624439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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