发布求助
文献互助 智能选刊 最新文献

2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)最新文献

筛选
英文 中文
FinFET: From compact modeling to circuit performance FinFET:从紧凑的建模到电路性能
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713788
F. He, Xingye Zhou, Chenyue Ma, Jian Zhang, Zhiwei Liu, Wen Wu, Xukai Zhang, Lining Zhang
{"title":"FinFET: From compact modeling to circuit performance","authors":"F. He, Xingye Zhou, Chenyue Ma, Jian Zhang, Zhiwei Liu, Wen Wu, Xukai Zhang, Lining Zhang","doi":"10.1109/EDSSC.2010.5713788","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713788","url":null,"abstract":"FinFET device, the promise one of all candidates which may extend CMOS scaling to 10nm and beyond, has attracted intensive research interest in recent years. In paralleling the process technology and circuit design methodology, a compact model which serves as a link between the process technology and circuit design is strongly demanded. In this paper, we first review the FinFET process technology including SOI-FinFET and bulk-FinFET. Then a potential-based compact model is proposed to describe the electrical characteristics of the FinFET transistor. The model is verified by 2-D numerical simulation and is implemented into HSPICE simulator. Finally, the reliability issue of the FinFET device and circuit functions are illustrated and analyzed, which are important for the practical applications and circuit design.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"118 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120941855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Electrical characterization of self-aligned titanium silicide SBDs formed by furnace annealing 炉退法制备自对准硅化钛固态硬盘的电学特性
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713677
Elena Barbarini, S. Ferrero, C. Pirri
{"title":"Electrical characterization of self-aligned titanium silicide SBDs formed by furnace annealing","authors":"Elena Barbarini, S. Ferrero, C. Pirri","doi":"10.1109/EDSSC.2010.5713677","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713677","url":null,"abstract":"The control of the Schottky barrier is fundamental to minimize the power loss of Schottky Barrier Diodes (SBDs) and the metal-semiconductor interface properties strongly affect the overall performances of such devices. In this paper we report on the results of different TiSi - based Schottky contacts formation experiments with the aim to produce SBDs using standard furnace annealing. The objective is to implement a robust production process and to obtain a diode capable to operate at high frequencies and power densities for long periods of time, minimizing the reverse power losses.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115209442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A low noise charge sensitive amplifier with adjustable leakage compensation in 0.18µm CMOS process 采用0.18µm CMOS工艺，具有可调漏损补偿的低噪声电荷敏感放大器
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713693
Xiangyu Li, Qi Zhang, Yihe Sun
{"title":"A low noise charge sensitive amplifier with adjustable leakage compensation in 0.18µm CMOS process","authors":"Xiangyu Li, Qi Zhang, Yihe Sun","doi":"10.1109/EDSSC.2010.5713693","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713693","url":null,"abstract":"Gate leakage of charge sensitive amplifier (CSA) in deep submicron process not only increases noise but also impacts the DC voltage of preamplifier output. This paper proposes a CSA for CdZnTe particle detector readout implemented in 0.18µm CMOS process including its new reset and leakage compensation configuration which has low noise and short reset time, especially, is adjustable to fit leakage current variation. This design is tape out verified. The test chip achieves 250e equivalent noise charge. And its reset time is adjustable indeed.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116051115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
RESET modeling of PCM using thermal budget approach 利用热预算方法对PCM进行RESET建模
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713782
K. C. Kwong, Jin He, P. Mok, M. Chan
{"title":"RESET modeling of PCM using thermal budget approach","authors":"K. C. Kwong, Jin He, P. Mok, M. Chan","doi":"10.1109/EDSSC.2010.5713782","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713782","url":null,"abstract":"In this work, the phase transition from crystalline state to amorphous state during RESET programming of a phase change memory is studied. A thermal budget approach is developed to describe the effect of cell structure, input current pulse amplitude and the quenching time on the final resistance after RESET programming. The model has been implemented to a circuit simulator and verified by experimental data reported in the literature.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121848266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Validity of Modal Expansion Method for the optical waveguide with PML PML光波导模态展开法的有效性
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713672
Jianxin Zhu, Zengsi Chen
{"title":"Validity of Modal Expansion Method for the optical waveguide with PML","authors":"Jianxin Zhu, Zengsi Chen","doi":"10.1109/EDSSC.2010.5713672","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713672","url":null,"abstract":"The perfectly matched layer (PML) is a widely used technique for the numerical simulations of the unbounded wave propagation problems. When unbounded waveguide is terminated by a finite PML, it gives rise to three classes of modes, i.e., propagation modes, leaky modes and Berenger modes (PML modes). The classical Modal Expansion Method only involves propagation modes and a continuous spectrum of radiation modes, but the infinite integral is sophisticated. In this paper, we study the validity of Modal Expansion Method with these three classes of modes. All the discrete modes of the finite PML-truncated waveguide are computed by the asymptotic approximation combining with the Chebyshev pseudospectral method.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129232205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Model for ovonic threshold switch of amorphous GST based on hopping transport process 基于跳跃输运过程的非晶GST卵形阈值开关模型
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713697
Wei Wang, Xinnan Lin, Yiqun Wei, Laidong Wang, Ling-shi Wang, Jin He, Xing Zhang
{"title":"A Model for ovonic threshold switch of amorphous GST based on hopping transport process","authors":"Wei Wang, Xinnan Lin, Yiqun Wei, Laidong Wang, Ling-shi Wang, Jin He, Xing Zhang","doi":"10.1109/EDSSC.2010.5713697","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713697","url":null,"abstract":"This paper presents an OTS model for PCM application based on the hopping transport process, which is widely used in the organic semiconductor device simulation. In this work an equivalent hopping probability model is presented according to the Abrahams-Miller formula, meanwhile an equivalent capacitor model is presented to depict the charge distribution in the amorphous GST. By coupling the hopping probability model and the capacitor model, the OTS I–V characteristic for OTS effect with different geometry and trap density are achieved, and the results agree with those from the reported measurements data.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116177432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Advanced multi-high-operation-voltage I/O device design for 32nm gate-first HiK MG technology 先进的多高工作电压I/O器件设计，采用32nm栅极优先的HiK MG技术
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713769
Xusheng Wu, Y. Hu, N. Kusunoki, Z. Yang, G. Yang, Y. Teh, R. Kirshnan, S. Krishnan, J. Shepard, S. Han, Y. Lee, F. Arnaud, M. Sherony, J. Sudijono, A. Steegen
{"title":"Advanced multi-high-operation-voltage I/O device design for 32nm gate-first HiK MG technology","authors":"Xusheng Wu, Y. Hu, N. Kusunoki, Z. Yang, G. Yang, Y. Teh, R. Kirshnan, S. Krishnan, J. Shepard, S. Han, Y. Lee, F. Arnaud, M. Sherony, J. Sudijono, A. Steegen","doi":"10.1109/EDSSC.2010.5713769","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713769","url":null,"abstract":"This paper presents the advanced I/O device design for 32nm Hi-K Metal Gate technology with multi-high operation voltages. Process optimization work is done on the I/O composite gate dielectric stack to improve TDDB Vmax. By using advanced junction engineering, 3.3V device Isubmax is reduce by 30–40% without Ion degradation based on TCAD simulation guideline. At the same time, 2.5V device drive current and DIBL performance are maintained without degradations. Reliability stress testing result further confirms the inline electrical result with same trend. 3.3V I/O TDDB, HCI, and BTI results are reported.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126432027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Field-plate technique for high power compound semiconductor devices applications 场极板技术在大功率化合物半导体器件中的应用
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713727
H. Chiu, Chao-Wei Lin, Che-Kai Lin
{"title":"Field-plate technique for high power compound semiconductor devices applications","authors":"H. Chiu, Chao-Wei Lin, Che-Kai Lin","doi":"10.1109/EDSSC.2010.5713727","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713727","url":null,"abstract":"The field-plate (FP) technique for GaAs-based pseudomorphic high electron mobility transistors (pHEMTs) was discussed with various FP voltage, metal connection, and breakdown mechanism. In addition, these mechanisms of devices were also evaluated experimentally by their microwave and power performance. For breakdown voltage mechanism investigation, the design of experiment (DOE) with 16 transistors was adopted, the FP length extension exhibited a high efficiency to improve off-state breakdown voltage (BVoff) due its high suppression ability to thermionic-field emission (TFE) of gate electrons. However, FP induced depletion region is difficult to suppress channel impact-ionization mechanism which dominated the on-state breakdown voltage (BVon). In addition, FP length extension is beneficial for improving device flicker noise caused by surface states and GR width extension shows an opposite trend because un-cap Schottky layer exposure area is also increased with longer GR width extension.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"387 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125997545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Short locking time Phase-Locked Loop based on adaptive bandwidth control 基于自适应带宽控制的短锁定时间锁相环
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713761
Zhongjie Guo, Longsheng Wu, Youbao Liu
{"title":"Short locking time Phase-Locked Loop based on adaptive bandwidth control","authors":"Zhongjie Guo, Longsheng Wu, Youbao Liu","doi":"10.1109/EDSSC.2010.5713761","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713761","url":null,"abstract":"This paper presents a new structure of Phase-Locked Loop (PLL) with slope charge pump current, which is depended on the output of the phase and frequency detector. The proposed PLL consists of a conventional charge pump PLL and a slope current control unit. Once the pulse width of the charging current is widening, the slope control unit increases the charge current linearly. It also ensures a better stability, a shorter locking time, and as a result, a low jitter is obtained. Two PLL circuits are simulated under the same conditions: the first one uses the slope current control and locks after less than 2us with a low rms jitter of 2.05ps, while the second classical PLL locks after 8 us with high jitter.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127917213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Multilayer asymmetrical compact microstrip resonator cell band-pass filter using LTCC technology 采用LTCC技术的多层非对称紧凑型微带谐振单元带通滤波器
2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2010-12-01 DOI: 10.1109/EDSSC.2010.5713701
S. Chan, H. Chiu, K. Chin, J. S. Fu
{"title":"Multilayer asymmetrical compact microstrip resonator cell band-pass filter using LTCC technology","authors":"S. Chan, H. Chiu, K. Chin, J. S. Fu","doi":"10.1109/EDSSC.2010.5713701","DOIUrl":"https://doi.org/10.1109/EDSSC.2010.5713701","url":null,"abstract":"In this work, a multilayer asymmetrical compact microstrip resonator cell (ACMRC) structure was proposed. The multi-layer technology was effective in reducing more than 20% fractional area. Moreover, the experimental results showed that the insertion loss of −1.3dB was achieved. This ACMRC filter was introduced and promising on microwave circuit applications recently.","PeriodicalId":356342,"journal":{"name":"2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131285035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：481959085
Book学术官方微信