2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)最新文献_第3页

Configurable and Scalable High-Side or Low-Side Driver in BiCMOS with 20dBµV Emission at 88MHz 可配置和可扩展的BiCMOS高侧或低侧驱动器，20dBµV发射，88MHz

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392988

Sri Navaneeth Easwaran, Sunil Kashyap Kashyap, Deepak Sreedharan, R. Hubbard, V. Devarajan, W. Ray

{"title":"Configurable and Scalable High-Side or Low-Side Driver in BiCMOS with 20dBµV Emission at 88MHz","authors":"Sri Navaneeth Easwaran, Sunil Kashyap Kashyap, Deepak Sreedharan, R. Hubbard, V. Devarajan, W. Ray","doi":"10.1109/BCICTS48439.2020.9392988","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392988","url":null,"abstract":"System Basis Chips (SBC) demand configurable High Side (HS) or Low Side (LS) drivers for driving Light Emitting Diodes (LEDs) in HS or LS configuration. LS configuration is also used to create DC shift for instrumentation amplifiers for precision offset measurements. Instead of independent drivers for each configuration, a driver configurable for both HS and LS topologies with accurate current sensing is preferred. In this paper, a 40V slew rate controlled, configurable HS or LS driver with accurate current sensing to provide load current information and current limitation for automotive applications is presented. One of the challenges is to have precise current sensing of voltages as low as 2mV. Existing solutions use auto zeroing or chopper techniques. A simple and cost effective solution using NPN transistors in BiCMOS process is proposed. This simplifies the design of the driver for both HS and LS configurations and the freewheeling concept for inductive loads without adding external Schottky diodes. The switch drives 90mA load current with 300mV Drain-Source drop voltage. The slew rate is 220mV/µs with a conducted emission of 20dBµV at FM band of 88MHz. The current limit is 130mA with 100mA over current detection threshold.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121542396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Design of a wideband, 4 – 42.5 GHz Low Noise Amplifier in 0.25 µm GaAs pHEMT Technology 基于0.25µm GaAs pHEMT技术的4 - 42.5 GHz宽带低噪声放大器设计

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392907

M. Sakalas, P. Sakalas

引用次数: 2

A 108-Gbps, 162-mW Cherry-Hooper Transimpedance Amplifier 一个108 gbps, 162 mw的Cherry-Hooper跨阻放大器

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392928

Luis A. Valenzuela, Aaron Maharry, Hector Andrade, C. Schow, J. Buckwalter

引用次数: 5

Physics of Hot Carrier Degradation Under Saturation Mode Operation in SiGe HBTs SiGe HBTs饱和模式下热载子降解的物理性质

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392958

U. Raghunathan, Pui Yee, D. Brochu, V. Jain, Harrison P. Lee, J. Cressler, D. Ioannou

引用次数: 0

A 10 mW LNA with Temperature Compensation for 24 GHz Radar Applications in SiGe BiCMOS 基于SiGe BiCMOS的24ghz雷达温度补偿10mw LNA

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392906

V. Issakov, A. Werthof

{"title":"A 10 mW LNA with Temperature Compensation for 24 GHz Radar Applications in SiGe BiCMOS","authors":"V. Issakov, A. Werthof","doi":"10.1109/BCICTS48439.2020.9392906","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392906","url":null,"abstract":"This paper presents a low-power, two-channel, ESD-protected 24 GHz single-ended input to differential output single-stage cascode LNA with temperature compensation in Infineon's SiGe BiCMOS technology. We propose a circuit technique to reduce LNA performance variation over a wide temperature range by providing bias current with an optimal slope. This bias current is obtained by a weighted combination of PTAT current and reference current with zero temperature coefficient. The resulting circuit shows in measurement reduction of gain variation from 4.4 dB to 1.3 dB over the automotive temperature range −40 to 125°C. Additionally, the circuit offers two gain settings with a 6 dB step. To reduce power consumption, the circuit operates from a low supply voltage of 1.5 V. At the center frequency of 24 GHz the amplifier offers a gain of 14.4 dB and a noise figure of 2.7 dB including the on-chip input balun. The circuit exhibits linearity of −11.8 dBm input-referred 1dB compression point at 24 GHz. Single LNA channel consumes only 7 mA from a single 1.5 V supply. The circuit exhibits a 6 kV HBM hardness at the input RF pin. The chip size including two LNA channels and the pads is 0.93 mm2.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130395766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Modeling and characterization of HBT limits HBT极限的建模和表征

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392953

A. Scholten

引用次数: 1

Ultra-high Speed InP/GaAsSb-based Type-II Double-heterojunction Bipolar Transistors and Transfer Technology onto SiC Substrate 超高速InP/ gaassb型双异质结双极晶体管及其在SiC衬底上的转移技术

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392903

Y. Shiratori, T. Hoshi, H. Matsuzaki

{"title":"Ultra-high Speed InP/GaAsSb-based Type-II Double-heterojunction Bipolar Transistors and Transfer Technology onto SiC Substrate","authors":"Y. Shiratori, T. Hoshi, H. Matsuzaki","doi":"10.1109/BCICTS48439.2020.9392903","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392903","url":null,"abstract":"We report on InP/GaAsSb-based type-II double-heterojunction bipolar transistor (DHBT) scaling and transfer technology on SiC substrate to improve RF performance for THz applications. While vertical and lateral scaling is essential to boost the RF performance of InP-based HBTs, degradation of their breakdown voltage and increasing thermal resistance (Rth) are critical issues. To maintain high breakdown voltage, we have developed an InP/GaAsSb-based type-II DHBT structure with a simple InP collector. The 0.24-µm-wide-emitter DHBT with a collector thickness of 40 nm exhibits a record peak ft of 813 GHz and relatively high BVCEO of 2.6 V. To reduce Rth, we developed an Au-subcollector DHBT structure, in which DHBT epitaxial layers are bonded to a high-thermal-conductivity SiC substrate through an Au adhesion layer. This technology enables Rth to be reduced by 75% compared with DHBTs on InP substrate without degrading the current gain or breakdown voltage. Thanks to the lower Rth, ft can also be improved by increasing the collector current density. The combination of InP/GaAsSb-based DHBT technology and the Au-subcollector DHBT structure effectively boosts RF performance by device scaling while maintaining the breakdown voltage and junction temperature.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115567203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

SLC-ASM-HEMT: An Accurate compact model for SLCFET RF switch SLC-ASM-HEMT:精确紧凑的SLCFET射频开关模型

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392941

S. Khandelwal, Brian Novak, Jordan Merkel, Ken A. Nagamatsu, J. Parke, Mark Yu, P. Shea, R. Howell

引用次数: 0

The DARPA Millimeter Wave Digital Arrays (MIDAS) Program DARPA毫米波数字阵列(MIDAS)计划

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392956

T. Hancock, Steven Gross, J. McSpadden, L. Kushner, J. Milne, J. Hacker, Ryan Walsh, C. Hornbuckle, C. Campbell, K. Kobayashi

引用次数: 4

Trends in Imaging Radars Powered by Modern Silicon 现代硅驱动成像雷达的发展趋势

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2020-11-16 DOI: 10.1109/BCICTS48439.2020.9392949

S. Ahmed

引用次数: 0