{"title":"超高速InP/ gaassb型双异质结双极晶体管及其在SiC衬底上的转移技术","authors":"Y. Shiratori, T. Hoshi, H. Matsuzaki","doi":"10.1109/BCICTS48439.2020.9392903","DOIUrl":null,"url":null,"abstract":"We report on InP/GaAsSb-based type-II double-heterojunction bipolar transistor (DHBT) scaling and transfer technology on SiC substrate to improve RF performance for THz applications. While vertical and lateral scaling is essential to boost the RF performance of InP-based HBTs, degradation of their breakdown voltage and increasing thermal resistance (Rth) are critical issues. To maintain high breakdown voltage, we have developed an InP/GaAsSb-based type-II DHBT structure with a simple InP collector. The 0.24-µm-wide-emitter DHBT with a collector thickness of 40 nm exhibits a record peak ft of 813 GHz and relatively high BVCEO of 2.6 V. To reduce Rth, we developed an Au-subcollector DHBT structure, in which DHBT epitaxial layers are bonded to a high-thermal-conductivity SiC substrate through an Au adhesion layer. This technology enables Rth to be reduced by 75% compared with DHBTs on InP substrate without degrading the current gain or breakdown voltage. Thanks to the lower Rth, ft can also be improved by increasing the collector current density. The combination of InP/GaAsSb-based DHBT technology and the Au-subcollector DHBT structure effectively boosts RF performance by device scaling while maintaining the breakdown voltage and junction temperature.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Ultra-high Speed InP/GaAsSb-based Type-II Double-heterojunction Bipolar Transistors and Transfer Technology onto SiC Substrate\",\"authors\":\"Y. Shiratori, T. Hoshi, H. Matsuzaki\",\"doi\":\"10.1109/BCICTS48439.2020.9392903\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report on InP/GaAsSb-based type-II double-heterojunction bipolar transistor (DHBT) scaling and transfer technology on SiC substrate to improve RF performance for THz applications. While vertical and lateral scaling is essential to boost the RF performance of InP-based HBTs, degradation of their breakdown voltage and increasing thermal resistance (Rth) are critical issues. To maintain high breakdown voltage, we have developed an InP/GaAsSb-based type-II DHBT structure with a simple InP collector. The 0.24-µm-wide-emitter DHBT with a collector thickness of 40 nm exhibits a record peak ft of 813 GHz and relatively high BVCEO of 2.6 V. To reduce Rth, we developed an Au-subcollector DHBT structure, in which DHBT epitaxial layers are bonded to a high-thermal-conductivity SiC substrate through an Au adhesion layer. This technology enables Rth to be reduced by 75% compared with DHBTs on InP substrate without degrading the current gain or breakdown voltage. Thanks to the lower Rth, ft can also be improved by increasing the collector current density. The combination of InP/GaAsSb-based DHBT technology and the Au-subcollector DHBT structure effectively boosts RF performance by device scaling while maintaining the breakdown voltage and junction temperature.\",\"PeriodicalId\":355401,\"journal\":{\"name\":\"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BCICTS48439.2020.9392903\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS48439.2020.9392903","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ultra-high Speed InP/GaAsSb-based Type-II Double-heterojunction Bipolar Transistors and Transfer Technology onto SiC Substrate
We report on InP/GaAsSb-based type-II double-heterojunction bipolar transistor (DHBT) scaling and transfer technology on SiC substrate to improve RF performance for THz applications. While vertical and lateral scaling is essential to boost the RF performance of InP-based HBTs, degradation of their breakdown voltage and increasing thermal resistance (Rth) are critical issues. To maintain high breakdown voltage, we have developed an InP/GaAsSb-based type-II DHBT structure with a simple InP collector. The 0.24-µm-wide-emitter DHBT with a collector thickness of 40 nm exhibits a record peak ft of 813 GHz and relatively high BVCEO of 2.6 V. To reduce Rth, we developed an Au-subcollector DHBT structure, in which DHBT epitaxial layers are bonded to a high-thermal-conductivity SiC substrate through an Au adhesion layer. This technology enables Rth to be reduced by 75% compared with DHBTs on InP substrate without degrading the current gain or breakdown voltage. Thanks to the lower Rth, ft can also be improved by increasing the collector current density. The combination of InP/GaAsSb-based DHBT technology and the Au-subcollector DHBT structure effectively boosts RF performance by device scaling while maintaining the breakdown voltage and junction temperature.