2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)最新文献

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A New Wideband, Low Insertion Loss SiGe Digital Step Attenuator A New Wideband, Low Insertion Loss SiGe Digital Step Attenuator 一种新型宽带、低插入损耗SiGe数字阶跃衰减器
Clifford D. Y. Cheon, Moon-Kyu Cho, Sunil G. Rao, A. Cardoso, J. Connor, J. Cressler
{"title":"A New Wideband, Low Insertion Loss SiGe Digital Step Attenuator A New Wideband, Low Insertion Loss SiGe Digital Step Attenuator","authors":"Clifford D. Y. Cheon, Moon-Kyu Cho, Sunil G. Rao, A. Cardoso, J. Connor, J. Cressler","doi":"10.1109/BCICTS48439.2020.9392983","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392983","url":null,"abstract":"This paper presents a new, wideband digital step attenuator (DSA) implemented using SiGe HBTs. The vertical profile of the SiGe HBT presents small parasitic shunt capacitance and, thus, the loss from the switches in a switched-type attenuator is significantly reduced. For a 6-bit DSA covering a maximum attenuation of 31.5 dB with 0.5 dB steps, reduced T-type cells with reverse-saturated SiGe HBTs are used for low attenuation cells and switched pi-type cells with novel anti-parallel (AP) SiGe HBT pair series switches are used for high attenuation cells. In addition to the symmetry of the AP SiGe HBT pair, reduced T-type and switched pi-type cells are placed alternately to distribute parasitic components and to achieve better overall symmetry. As a result, state-of-the-art performance is achieved over a wide bandwidth, from DC-to-60 GHz, with an insertion loss of 7.5 dB at 50 GHz, 31.5 dB of attenuation range and less than 2.8 mW of power consumption.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"276 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131495314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Reverse Intermodulation in Multi-Tone Array Transmitters 多音阵列发射机中的反向互调
Anton N. Atanasov, M. S. O. Alink, F. V. Vliet
{"title":"Reverse Intermodulation in Multi-Tone Array Transmitters","authors":"Anton N. Atanasov, M. S. O. Alink, F. V. Vliet","doi":"10.1109/BCICTS48439.2020.9392972","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392972","url":null,"abstract":"The modern spectral, and thereby linearity, requirements force 5G phased-array transmitter systems to operate at reduced power efficiency, as they can no longer use voluminous filtering. To reduce the linearity requirements of the transmitter, we consider the case of an array consisting of closely spaced radiating elements operating at different frequencies. The coupled tones from one element to another create reverse intermodulation distortion (RIMD). We explain how RIMD is created within a power amplifier (PA), and derive an estimate for the power of the RIMD components. We provide a set of measurements for an X-Band GaAs PA and draw a direct comparison between RIMD and IMD. We show that RIMD has a third-order behaviour up to very high reverse power levels, opening up the perspective for higher output power operation as well as simpler and lower-power predistortion in multi-tone array systems such as 5G and radar.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133768761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
128-GS/s 1-to-4 SiGe Analog Demultiplexer with 36-GHz Bandwidth for 6-bit Data Converters 128-GS/s 1-to-4 SiGe模拟解复用器,36-GHz带宽,用于6位数据转换器
P. Thomas, T. Tannert, M. Grözing, M. Berroth
{"title":"128-GS/s 1-to-4 SiGe Analog Demultiplexer with 36-GHz Bandwidth for 6-bit Data Converters","authors":"P. Thomas, T. Tannert, M. Grözing, M. Berroth","doi":"10.1109/BCICTS48439.2020.9392964","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392964","url":null,"abstract":"Coherent optical transceivers cover multiple wavelengths to meet the growing request for ultra-wideband data links, e.g. from ultra-high definition video-on-demand. However, costs increase with the number of wavelengths per channel, so that higher baud rates are used to reduce the receiver's complexity, while simultaneously increasing electrical bandwidth requirements. Especially sampling rate and analog input bandwidth between photodiode and data converters need to be improved. For that purpose, we present a 4-way time-interleaving analog demultiplexer in one of the most advanced SiGe-BiCMOS technologies to date, operating at the highest reported sampling rate of 128 GS/s. The total harmonic distortion of −37 to −22 dB indicates an accuracy of 5.9–3.3 ENOBTHD across the entire 36-GHz bandwidth of the sampled signal path and the signal-to-noise ratio of 28 dB at 2 GHz enables 4.4 ENOBSNR. Each of the sampling front end's four output paths can drive a 32-GS/s 6-bit analog-to-digital converter that can be connected to commercially available 32-Gbit/s digital interfaces. Combining an ultra-high symbol rate with medium accuracy allows for a data rate beyond 1 Tbit/s per wavelength with dual polarization and quadrature amplitude modulation in a cost-efficient coherent optical receiver.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122382567","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Microwave Performance of Ferroelectric-Gated GaN HEMTs 铁电门控GaN hemt的微波性能
Chunlei Wu, Jeffrey A. Smith, S. Datta, Yu Cao, Jinqiao Xie, E. Beam, P. Fay
{"title":"Microwave Performance of Ferroelectric-Gated GaN HEMTs","authors":"Chunlei Wu, Jeffrey A. Smith, S. Datta, Yu Cao, Jinqiao Xie, E. Beam, P. Fay","doi":"10.1109/BCICTS48439.2020.9392955","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392955","url":null,"abstract":"Hf0.5Zr0.5O2 (HZO) based ferroelectric gate high-electron-mobility transistors (FEHEMTs) on AlGaN/GaN heterostructures exhibiting programable threshold voltage are experimentally demonstrated. The RF behavior of ferroelectric-gated GaN-channel HEMTs has been measured and reported for the first time. Due to the ferroelectric gate stack, a programable threshold voltage range of 1.2 V was obtained. The RF characteristics show that the $f_{t}$ of conventional MISHEMTs and ferroelectric-gate HEMTs are similar, indicating that carrier transport is not strongly affected by the ferroelectric gate stack. However, significant dispersion is observed in both the RF transconductance and gate capacitance of the FEHEMTs, suggesting that in FEHEMTs the channel charge is insensitive to high frequency RF gate voltage signals. The results provide insights regarding the exploitation of FE gate stacks on GaN and related materials for future nonvolatile RF/microwave applications.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128388416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Robust Extraction of Cardiff Model Parameters from Appropriately Tailored Measured Load-Pull Data 从适当定制的测量负载-拉力数据中鲁棒提取Cardiff模型参数
P. Tasker
{"title":"Robust Extraction of Cardiff Model Parameters from Appropriately Tailored Measured Load-Pull Data","authors":"P. Tasker","doi":"10.1109/BCICTS48439.2020.9392942","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392942","url":null,"abstract":"In the design of power amplifiers the ideal methodology would be a CAD based design cycle using a physics-based state-function (I-V, Q-V) non-linear model. In practice state-function models are often more measurement-based than physics-based and by design very general, which does limit their accuracy. Behavioral models extracted directly from measured data provide a complementary methodology, that should address the accuracy limitations of state function models. However, their success in achieving this is highly dependent on the user's behavioral model complexity selection and their measurement dataset choice. In this paper, it will be shown that this issue for the Cardiff Model can be resolved via the design of appropriately tailored measurement datasets.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129137615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
High Performance 150 mm RF GaN Technology with Low Memory Effects 低记忆效应的高性能150mm射频GaN技术
K. Moore, B. Green, S. Klingbeil, C. Rampley, P. Renaud, D. Burdeaux, D. Hill, C. Zhu, J. Wan, J. Finder, K. Kim, C. Gaw, T. Arnold, F. Vanaverbeke, R. Embar, P. Rashev, M. Masood
{"title":"High Performance 150 mm RF GaN Technology with Low Memory Effects","authors":"K. Moore, B. Green, S. Klingbeil, C. Rampley, P. Renaud, D. Burdeaux, D. Hill, C. Zhu, J. Wan, J. Finder, K. Kim, C. Gaw, T. Arnold, F. Vanaverbeke, R. Embar, P. Rashev, M. Masood","doi":"10.1109/BCICTS48439.2020.9392951","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392951","url":null,"abstract":"Gallium nitride (GaN) heterostructure field effect transistor (HFET) technology is rapidly becoming the solution of choice for a variety of infrastructure applications for 4G and beyond. In response to this rapidly increasing demand, NXP has developed an internal 150mm RF GaN HFET technology for their RF power lineup. This technology features high gain, high efficiency, high power density, very low memory effects, and high reliability in a high volume manufacturing environment that is complemented by NXP's years of experience in the RF power market through their RF LDMOS product line.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132314602","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Impact of Large-signal Operation on DC Operating Point of Horizontal Current Bipolar Transistor 大信号工作对水平电流双极晶体管直流工作点的影响
Željko Osrečki, J. Žilak, M. Koričić, T. Suligoj
{"title":"Impact of Large-signal Operation on DC Operating Point of Horizontal Current Bipolar Transistor","authors":"Željko Osrečki, J. Žilak, M. Koričić, T. Suligoj","doi":"10.1109/BCICTS48439.2020.9392946","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392946","url":null,"abstract":"The impact of bias configuration on DC operating point in large-signal operation is analyzed for Horizontal Current Bipolar Transistor (HCBT) by time-domain load-pull measurements at 2.4 GHz. The two limiting cases, constant base-emitter voltage (c-VBE) and constant base current (c-IB), are investigated with respect to where the hard-limitation occurs, in the cut-off or saturation region. For the two cases, it is found that the linear operating range, in which the gain is flat, heavily depends on the hard-limitation type present. Additionally, operation above open-base breakdown voltage shows sharp decrease of DC collector current of 23 mA near compression point for c-IB bias. Finally, the c-V BE bias shows around 5% higher collector efficiency in the back-off range while targeting the same output power in I-dB compression point.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121867697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An over 220-GHz-Bandwidth Distributed Active Power Combiner in 250-nm InP DHBT 250nm InP DHBT中超过220 ghz带宽的分布式有源功率合成器
Teruo Jyo, M. Nagatani, M. Ida, M. Mutoh, H. Wakita, Naoki Terao, H. Nosaka
{"title":"An over 220-GHz-Bandwidth Distributed Active Power Combiner in 250-nm InP DHBT","authors":"Teruo Jyo, M. Nagatani, M. Ida, M. Mutoh, H. Wakita, Naoki Terao, H. Nosaka","doi":"10.1109/BCICTS48439.2020.9392961","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392961","url":null,"abstract":"A distributed active power combiner (DAPC) was designed and fabricated in 250-nm indium phosphide (InP) double-heterojunction bipolar transistor (DHBT) technology. A new DAPC configuration by using two separated distributed amplifiers with a distributed resistive combiner (DRC) is proposed to extend the bandwidth and reduce input crosstalk. The fabricated DAPC achieved a gain of 5 dB with a bandwidth of over 220 GHz, and an input crosstalk of less than −32 dB up to 67 GHz.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"2000 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123891292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Circuit-Level Safe-Operating-Area of a High-Speed SiGe BiCMOS Wireline Driver 高速SiGe BiCMOS有线驱动器的电路级安全工作区
Arya Moradinia, Rafael Perez Martinez, Jeffrey W. Teng, Nelson E. Sepulveda-Ramos, Harrison P. Lee, J. Cressler
{"title":"Circuit-Level Safe-Operating-Area of a High-Speed SiGe BiCMOS Wireline Driver","authors":"Arya Moradinia, Rafael Perez Martinez, Jeffrey W. Teng, Nelson E. Sepulveda-Ramos, Harrison P. Lee, J. Cressler","doi":"10.1109/BCICTS48439.2020.9392944","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392944","url":null,"abstract":"In this paper, the circuit-level reliability and device-level reliability mechanisms of a SiGe wireline driver circuit are investigated. The driver is a resistively degenerated and loaded differential cascode amplifier, designed in GlobalFoundries 90-nm SiGe 9HP technology. The goal of this work is to identify a performance-based, circuit-SOA (C-SOA) for a wireline driver in terms of its gain and OP1dB at 5 GHz. This paper presents the concept of performance-based C-SOA as a biasing regime where the RF performance of a circuit does not degrade over time due to applied electrical stress. A wide range of current density, Jc, and collector base voltage, VCB bias points were selected for pre-and post-aging performance assessment. A 10,000 second stress was applied for each bias point to evaluate potential performance degradation. For bias points that saw performance degradation, a device-level explanation is presented. RF circuit performance that saw no degradation was established at 2x JC at peak fT and 1.2x BVCEO, while demonstrating 5 dB of additional (untapped) OP1dB in comparison to the device-specified PDK-provided SOA operating point.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121205789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of an 18–50 GHz SiGe HBT Cascode Non-uniform Distributed Power Amplifier 18-50 GHz SiGe HBT级联非均匀分布式功率放大器的设计
Seokchul Lee, Inchan Ju, Yunyi Gong, A. Cardoso, J. Connor, Moon-Kyu Cho, J. Cressler
{"title":"Design of an 18–50 GHz SiGe HBT Cascode Non-uniform Distributed Power Amplifier","authors":"Seokchul Lee, Inchan Ju, Yunyi Gong, A. Cardoso, J. Connor, Moon-Kyu Cho, J. Cressler","doi":"10.1109/BCICTS48439.2020.9392963","DOIUrl":"https://doi.org/10.1109/BCICTS48439.2020.9392963","url":null,"abstract":"This paper presents the design of an 18–50 GHz SiGe HBT cascode, non-uniform distributed power amplifier (NDPA), which was implemented in 0.13-µm SiGe BiCMOS technology. To expand the NDPA concept into the millimeterwave (mm-wave) spectrum, a multi-section lumped element artificial transmission line is proposed to synthesize high characteristic impedance of the first and second stage's collector lines, thereby maintaining an optimum load at each active stage over the entire bandwidth. The proposed mm-wave NDPA achieves a peak saturated output power of 19.0 dBm and a peak power-added efficiency (PAE) of 19.1% at 32.0 GHz. The PAE was above 14.2% across the 18–50 GHz bandwidth, which demonstrates the NDPA's optimum power matching capability.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115376986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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