{"title":"基于0.25µm GaAs pHEMT技术的4 - 42.5 GHz宽带低噪声放大器设计","authors":"M. Sakalas, P. Sakalas","doi":"10.1109/BCICTS48439.2020.9392907","DOIUrl":null,"url":null,"abstract":"This paper presents an ultra-wideband, 4 – 42.5 GHz Low Noise Amplifier (LNA), that stands out for its flat small signal power gain (SSG) response, low DC power consumption and good linearity. Design approach for simultaneous noise and power matching was introduced. Based on this approach, combined transmission line and lumped element matching networks were implemented. Without employing a negative feedback, a 1.5 dB gain flatness and a good noise matching was achieved over an ultra-wide bandwidth. Designed in a commercial 0.25 µm GaAs pHEMT process, the 2-stage LNA exhibits an SSG of 13 dB, a minimum noise figure of 3.6 dB, OIP2 and OIP3 greater than 38 dBm and 25 dBm respectively. The total die area is 2.4 mm2, whereas the circuit consumes 32.5 mA from a 4 V DC power source.","PeriodicalId":355401,"journal":{"name":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Design of a wideband, 4 – 42.5 GHz Low Noise Amplifier in 0.25 µm GaAs pHEMT Technology\",\"authors\":\"M. Sakalas, P. Sakalas\",\"doi\":\"10.1109/BCICTS48439.2020.9392907\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an ultra-wideband, 4 – 42.5 GHz Low Noise Amplifier (LNA), that stands out for its flat small signal power gain (SSG) response, low DC power consumption and good linearity. Design approach for simultaneous noise and power matching was introduced. Based on this approach, combined transmission line and lumped element matching networks were implemented. Without employing a negative feedback, a 1.5 dB gain flatness and a good noise matching was achieved over an ultra-wide bandwidth. Designed in a commercial 0.25 µm GaAs pHEMT process, the 2-stage LNA exhibits an SSG of 13 dB, a minimum noise figure of 3.6 dB, OIP2 and OIP3 greater than 38 dBm and 25 dBm respectively. The total die area is 2.4 mm2, whereas the circuit consumes 32.5 mA from a 4 V DC power source.\",\"PeriodicalId\":355401,\"journal\":{\"name\":\"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"volume\":\"105 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BCICTS48439.2020.9392907\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS48439.2020.9392907","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a wideband, 4 – 42.5 GHz Low Noise Amplifier in 0.25 µm GaAs pHEMT Technology
This paper presents an ultra-wideband, 4 – 42.5 GHz Low Noise Amplifier (LNA), that stands out for its flat small signal power gain (SSG) response, low DC power consumption and good linearity. Design approach for simultaneous noise and power matching was introduced. Based on this approach, combined transmission line and lumped element matching networks were implemented. Without employing a negative feedback, a 1.5 dB gain flatness and a good noise matching was achieved over an ultra-wide bandwidth. Designed in a commercial 0.25 µm GaAs pHEMT process, the 2-stage LNA exhibits an SSG of 13 dB, a minimum noise figure of 3.6 dB, OIP2 and OIP3 greater than 38 dBm and 25 dBm respectively. The total die area is 2.4 mm2, whereas the circuit consumes 32.5 mA from a 4 V DC power source.
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