Modeling and characterization of HBT limits

Abstract

In this paper, we present an overview of electrothermal runaway and mixed-mode degradation in HBTs. Both these effects limit the bias up to which an HBT can be used in circuit design. For electrothermal runaway, we discuss the DC case, with and without externally applied base resistance, and also the “pulsed SOA” case, which is most relevant to RF applications. For mixed-mode degradation, we focus on the deceleration which occurs at very long time scales, and which, if accounted for, leads to a strongly enhanced lifetime prediction. Finally, we make some remarks about the physical explanation for mixed-mode degradation. All this work is illustrated with measurements on NPN transistors from NXP's QUBiC GEN8 BiCMOS process.