2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES)最新文献

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High Resolution Latched Comparator Implemented in 22 nm FD-SOI Process 高分辨率锁存比较器实现在22纳米FD-SOI工艺
Z. Jaworski
{"title":"High Resolution Latched Comparator Implemented in 22 nm FD-SOI Process","authors":"Z. Jaworski","doi":"10.23919/MIXDES.2018.8436803","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436803","url":null,"abstract":"This paper presents the design of comparator dedicated for high linearity flash ADC, implemented in 22 nm FD-SOI process with 0.8 V supply. The block employs latched dynamic comparator preceded by two-stage preamplifier. The main obstacle to obtain high resolution comparator is transistors' mismatch resulting in relatively high offset voltage of the amplifier. Thus, compensation technique based on trimming of transistor's threshold voltage by means of modulating of back-gate polarization has been employed. The obtained comparator presents resolution of $pmb{pm 3 mathrm{mV}}$.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114785978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Monolithic Complementary Multi-terminal RC-IGBT Chips for Compact Multi-phase Power Converter 用于紧凑型多相电源变换器的单片互补多端RC-IGBT芯片
A. Lale, A. Bourennane, F. Richardeau
{"title":"Monolithic Complementary Multi-terminal RC-IGBT Chips for Compact Multi-phase Power Converter","authors":"A. Lale, A. Bourennane, F. Richardeau","doi":"10.23919/MIXDES.2018.8436866","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436866","url":null,"abstract":"The paper deals with the monolithic / “on-chip” integration of multi-phase power converters in medium power applications. It focuses on the integration of the power converter within two original multi-terminal complementary substrates (P and N substrates). Interesting advantages can be brought by the integration of the multi-phase converter within only two complementary multi-terminal power chips. These advantages include power chips realization simplification, multi-terminal chips assembly simplification, gate driver circuit simplification and low EMI through the circuit board.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126564842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Towards Embedded Systems Formal Verification Translation from SysML into Petri Nets 从SysML到Petri网的嵌入式系统形式化验证转换
W. Szmuc, T. Szmuc
{"title":"Towards Embedded Systems Formal Verification Translation from SysML into Petri Nets","authors":"W. Szmuc, T. Szmuc","doi":"10.23919/MIXDES.2018.8436870","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436870","url":null,"abstract":"A verification of embedded systems described using SysML is considered. The main idea consists in translation of SysML artifacts into Colored Petri Net models. The paper focuses on mapping of main building units, the so-called blocks into the corresponding nets. The nets may be verified directly or using Temporal Logic provers.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130601683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Photoelectric Measurements of the Modern Graphene-Insulator-Semiconductor (GIS) Test Structures 现代石墨烯-绝缘体-半导体(GIS)测试结构的光电测量
K. Piskorski, H. Przewlocki, V. Passi, J. Ruhkopf, M. Lemme
{"title":"Photoelectric Measurements of the Modern Graphene-Insulator-Semiconductor (GIS) Test Structures","authors":"K. Piskorski, H. Przewlocki, V. Passi, J. Ruhkopf, M. Lemme","doi":"10.23919/MIXDES.2018.8436596","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436596","url":null,"abstract":"The fundamental property of any semiconductor device is its energy band diagram, which allows prediction of parameters and limitations of the device. The commonly used and most effective methods of band diagram determination are based on photoelectric measurements of specially prepared test structures, most often metal-insulator-semiconductor (MIS) capacitors. Such capacitors must have thin enough metal gates to make them semitransparent to light, which has to penetrate the gate and irradiate the substrate causing photoemission of carriers from both the gate and the substrate into the insulator. This way barrier heights (band offsets) on both sides of the insulator layer can be determined. In this paper we present the advantages of using in the photoelectric measurements the graphene-insulator-semiconductor (GIS) structures in which the metal gate is replaced by a graphene gate. Due to negligible thickness and high transparency of graphene photoelectric measurements allow determination of barrier heights for emission of both electrons and holes from the substrate into the insulator which allows direct determination of the insulator band gap. Using MIS structures it is practically impossible to measure the photocurrent due to hole emission from the substrate since it is overwhelmed by the large photocurrent due to electrons simultaneously emitted from the metal gate.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"332 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134463397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
MEMS Gyroscope FEM Modeling and Simulation MEMS陀螺仪有限元建模与仿真
J. Nazdrowicz, M. Szermer, A. Stawinski, A. Napieralski
{"title":"MEMS Gyroscope FEM Modeling and Simulation","authors":"J. Nazdrowicz, M. Szermer, A. Stawinski, A. Napieralski","doi":"10.23919/MIXDES.2018.8436827","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436827","url":null,"abstract":"This paper the analysis of a 3D model of MEMS Gyroscope is presented. The FEM analysis of the 3D structure has been performed in very popular COMSOL Multiphysics software. Authors took particular attention on mechanical behaviour particular parts of this device especially combs (used in electrostatical actuators and sensors) in drive and sense directions. For further electrostatic analysis (which is not covered in this article) this analysis has enormous meaning because any deformation of comb structure during operation influences on quality of electrostatic actuating and sensing. In this paper author performed stress results and deformation analysis in sense direction, however similar conclusions one can be drawn for drive direction.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114472522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Parallel Critical Path Tracing Fault Simulation in Sequential Circuits 顺序电路中并行关键路径跟踪故障仿真
J. Kousaar, R. Ubar, S. Kostin, S. Devadze, J. Raik
{"title":"Parallel Critical Path Tracing Fault Simulation in Sequential Circuits","authors":"J. Kousaar, R. Ubar, S. Kostin, S. Devadze, J. Raik","doi":"10.23919/MIXDES.2018.8436880","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436880","url":null,"abstract":"In this paper we present a very fast fault simulation method for sequential circuits, which is based on accommodation of exact parallel critical path tracing in combinational circuits for using it also in case of sequential circuits. Formulas are developed for parallel on-line analysis of the faults to classify them into two classes, which are eligible for combinational simulation, and which are not. The latter class of faults has to be simulated by any conventional fault simulation method used for sequential circuits. Combining two approaches to fault simulation - the combinational and sequential ones - allows dramatic speed-up of fault simulation in sequential circuits, which is demonstrated by experimental results.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133033165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Adaptive Wireless Lighting System 自适应无线照明系统
M. Zbiec, M. Jakubowski, D. Obrebski, Piotr Boguszcwicz, K. Zaraska, W. Grzesiak, P. Guzdek, P. Mackow, G. Kolaszczynski, Dariusz Solnica, Pawel Iwanicki
{"title":"Adaptive Wireless Lighting System","authors":"M. Zbiec, M. Jakubowski, D. Obrebski, Piotr Boguszcwicz, K. Zaraska, W. Grzesiak, P. Guzdek, P. Mackow, G. Kolaszczynski, Dariusz Solnica, Pawel Iwanicki","doi":"10.23919/MIXDES.2018.8436728","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436728","url":null,"abstract":"This paper describes adaptive lighting system with ZigBee capabilities, daylight mixing, true white light generation and occupancy sensor, dedicated to optimal and cost effective lighting of office spaces. Described work was carried out within the APRIL project, as a part of the 2nd Poland-Berlin cooperation in the field of photonics.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133536458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Edge Aware Adaptive Filtering Method for Image Denoising 图像去噪的边缘感知自适应滤波方法
W. Więcławek, M. Rudzki
{"title":"Edge Aware Adaptive Filtering Method for Image Denoising","authors":"W. Więcławek, M. Rudzki","doi":"10.23919/MIXDES.2018.8436917","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436917","url":null,"abstract":"This paper presents an adaptive edge-preserving image denoising technique. The proposed approach adaptively adjusts the filtering mask size and mask content to perform image denoising. The mask size is determined depending on the distance from the nearest edge in the image. Different edge detectors (Prewitt, Sobel, Canny, Perona-Malik) were considered and validated. The filtering mask coefficients were selected using various kernels, such as mean and median. The filtering quality of the proposed solution in its several variants was compared with anisotropic diffusion and frequently used spatial filtering techniques like mean or median that operate globally. The qualitative and quantitative comparison of the proposed method is based on commonly known image quality measures as well as on edge preservation measures. The obtained results show the potential of the method: Quality Index up to 0.84 and edge preservation β measure up to 98.49%.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"523 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123572583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Universal Behavioural Model for SiC Power MOSFETs Under Forward Bias 正向偏置下SiC功率mosfet的通用行为模型
Andrii Stefanskyi, L. Starzak, A. Napieralski
{"title":"Universal Behavioural Model for SiC Power MOSFETs Under Forward Bias","authors":"Andrii Stefanskyi, L. Starzak, A. Napieralski","doi":"10.23919/MIXDES.2018.8436864","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436864","url":null,"abstract":"In this work, a new behavioural model for SiC MOSFETs under forward bias has been presented. Its novel relationships enable to achieve higher accuracy of characteristics representation over a wide temperature range. In order to prove its universal applicability, it has been validated for different transistors from various manufacturers and the parameter extraction procedure has been described. The results obtained are on par or better than for the original models of the respective transistors, especially in the moderate inversion region and for temperature effects. The developed model is intended to form part of a comprehensive SiC MOSFET model covering forward, reverse and switching behaviour.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"130 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123758496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
On Advanced Current Conveyor Applications Having Capacitor Connected to Current Input Terminal 电容连接电流输入端的先进电流输送应用研究
R. Sotner, J. Petrzela, J. Jerabek, L. Langhammer, T. Dostál
{"title":"On Advanced Current Conveyor Applications Having Capacitor Connected to Current Input Terminal","authors":"R. Sotner, J. Petrzela, J. Jerabek, L. Langhammer, T. Dostál","doi":"10.23919/MIXDES.2018.8436867","DOIUrl":"https://doi.org/10.23919/MIXDES.2018.8436867","url":null,"abstract":"This paper discusses novel solutions of active building blocks (voltage-mode differentiator, all-pass filter) operating with current conveyors with grounded capacitor having intentionally connected to the current input terminal X. Because of real non-zero resistance of this current input terminal, the features of application are usually problematic. Proposed solutions bring elimination of these disadvantageous effects. Therefore, this work extends the exploitation of current conveyor-based building blocks and their applications. The current-controlled differential difference current conveyor was used in our designs and application of inverse inverting bandpass filter prepared for verification and implementation of presented differentiator. All theoretical evaluations are supported by PSpice analysis with CMOS models and macromodels representing used concepts and approaches.","PeriodicalId":349007,"journal":{"name":"2018 25th International Conference \"Mixed Design of Integrated Circuits and System\" (MIXDES)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121037756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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