顺序电路中并行关键路径跟踪故障仿真

J. Kousaar, R. Ubar, S. Kostin, S. Devadze, J. Raik
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引用次数: 1

摘要

本文提出了一种非常快速的顺序电路故障仿真方法,该方法基于对组合电路中精确并行关键路径跟踪的适应,以便在顺序电路中也能使用该方法。建立了故障并行在线分析的公式,将故障分为适合组合仿真和不适合组合仿真的两类。后一类故障必须用串行电路的常规故障模拟方法来模拟。结合组合和顺序两种故障仿真方法,时序电路的故障仿真速度得到了显著提高,实验结果证明了这一点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Parallel Critical Path Tracing Fault Simulation in Sequential Circuits
In this paper we present a very fast fault simulation method for sequential circuits, which is based on accommodation of exact parallel critical path tracing in combinational circuits for using it also in case of sequential circuits. Formulas are developed for parallel on-line analysis of the faults to classify them into two classes, which are eligible for combinational simulation, and which are not. The latter class of faults has to be simulated by any conventional fault simulation method used for sequential circuits. Combining two approaches to fault simulation - the combinational and sequential ones - allows dramatic speed-up of fault simulation in sequential circuits, which is demonstrated by experimental results.
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