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2015 45th European Solid State Device Research Conference (ESSDERC)最新文献

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The world's first high voltage GaN-on-diamond power devices 世界上第一个高压GaN-on-diamond功率器件
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324729
Turar Baltynov, V. Unni, E. Narayanan
{"title":"The world's first high voltage GaN-on-diamond power devices","authors":"Turar Baltynov, V. Unni, E. Narayanan","doi":"10.1109/ESSDERC.2015.7324729","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324729","url":null,"abstract":"This paper reports the fabrication method and electrical characterization results of the first-ever demonstrated high voltage AlGaN/GaN HEMTs on CVD diamond substrate. Fabricated circular GaN-on-Diamond HEMTs with gate-to-drain drift length of 17 μm and source field plate length of 3 μm show an off-state breakdown voltage of ~ 1100V. Temperature characterization of Capacitance voltage characteristics provides insight on the temperature dependence of VTH and 2DEG sheet carrier concentration in the fabricated devices.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"254 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122463964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Characterization and modeling of low-frequency noise in CVD-grown graphene FETs cvd生长的石墨烯fet中低频噪声的表征和建模
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324742
C. Mukherjee, Jorgue Daniel Aguirre Morales, S. Frégonèse, T. Zimmer, C. Maneux, H. Happy, Wei Wei
{"title":"Characterization and modeling of low-frequency noise in CVD-grown graphene FETs","authors":"C. Mukherjee, Jorgue Daniel Aguirre Morales, S. Frégonèse, T. Zimmer, C. Maneux, H. Happy, Wei Wei","doi":"10.1109/ESSDERC.2015.7324742","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324742","url":null,"abstract":"In this paper, we report the low-frequency noise characterization of CVD -grown Graphene FETs (GFET). Low-frequency measurements indicate a dominant contribution of 1/f noise in the drain current noise source. A quadratic dependence of the drain current-noise on drain current is observed. An overall comparison between different geometries of the two generations of the CVD GFETs is shown in terms of flicker noise levels and impact of access resistances on the noise response. The noise level inversely depends on the graphene area of the GFETs indicating that the locations of the primary noise sources are in the graphene layers. The flicker and Johnson noise sources are introduced in a compact model with DC parameters of the CVD GFET. Results from the noise compact model are validated with the measurement results showing good agreement.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122696261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Fast high power capacitive RF-MEMS switch for X-Band applications 用于x波段应用的快速高功率电容式RF-MEMS开关
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324736
A. Ziaei, S. Bansropun, P. Martins, M. L. Baillif
{"title":"Fast high power capacitive RF-MEMS switch for X-Band applications","authors":"A. Ziaei, S. Bansropun, P. Martins, M. L. Baillif","doi":"10.1109/ESSDERC.2015.7324736","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324736","url":null,"abstract":"This paper presents a thin film metallic membrane (~1μm) capacitive RF-MEMS shunt switch with a power handling of more than 20 W for X-Band applications. The device switching time is below 15 μs, in cold switching, for a 60 V applied voltage. The up-state capacitance is 40 fF, resulting in a less than 0.1 dB insertion losses at 10 GHz, simulated. The down-state capacitance, estimated at 3.1 pF, including the parasitic air capacitance from the surface roughness, results in a 77 capacitance ration for about 30 dB isolation, simulated. Measurements show up to a million cycles with no degradation on performances under 20W incident power in cold switching.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122888490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Step tunneling-enhanced hot-electron injection in vertical graphene base transistors 阶梯隧道增强的垂直石墨烯基晶体管热电子注入
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324749
S. Vaziri, M. Belete, A. Smith, E. Litta, G. Lupina, M. Lemme, M. Östling
{"title":"Step tunneling-enhanced hot-electron injection in vertical graphene base transistors","authors":"S. Vaziri, M. Belete, A. Smith, E. Litta, G. Lupina, M. Lemme, M. Östling","doi":"10.1109/ESSDERC.2015.7324749","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324749","url":null,"abstract":"This paper presents promising current-voltage characteristics of semiconductor-insulator-graphene tunnel diodes as the hot-electron injection unit in graphene base transistors (GBTs). We propose that by using a bilayer tunnel barrier one can effectively suppress the defect mediated carrier transport while enhancing the hot-electron emission through Fowler-Nordheim tunneling (FNT) and step tunneling (ST). A stack of TmSiO/TiO2 (1 nm/ 5.5 nm) is sandwiched between a highly doped Si substrate and a single layer graphene (SLG) as the electrodes. This tunnel diode exhibits high current with large nonlinearity suitable for the application in GBTs.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115677292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Metal gate VT modulation using PLAD N2 implants for Ge p-FinFET applications 使用PLAD N2植入物的金属栅极VT调制用于Ge p-FinFET应用
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324753
S. Kothari, C. Joishi, Dhirendra Vaidya, H. Nejad, B. Colombeau, S. Ganguly, S. Lodha
{"title":"Metal gate VT modulation using PLAD N2 implants for Ge p-FinFET applications","authors":"S. Kothari, C. Joishi, Dhirendra Vaidya, H. Nejad, B. Colombeau, S. Ganguly, S. Lodha","doi":"10.1109/ESSDERC.2015.7324753","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324753","url":null,"abstract":"This work reports multi-VT Ge gate stacks using low energy plasma-assisted doping (PLAD) with N2 for Ge p-FinFET applications. Varying implant dose and energy is used to demonstrate effective TiN work-function tuning over a range of 170 mV from near-midgap to near-valence band edge of Ge without significant impact on gate capacitance (effective oxide thickness (EOT)), interface quality and TiN resistance. However, unlike Si gate stacks, increased gate leakage in implanted samples is likely due to traps created in the HfO2 Hi-k layer and exposed to channel carriers due to a low band offset GeO2 interfacial layer.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"220 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116128349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Piezoresistive transduction optimization of p-doped poly-Silicon NEMS p掺杂多晶硅NEMS的压阻转导优化
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324735
I. Ouerghi, W. Ludurczak, L. Duraffourg, C. Ladner, A. I. Oudrhiri, P. Gergaud, M. Vinet, T. Ernst
{"title":"Piezoresistive transduction optimization of p-doped poly-Silicon NEMS","authors":"I. Ouerghi, W. Ludurczak, L. Duraffourg, C. Ladner, A. I. Oudrhiri, P. Gergaud, M. Vinet, T. Ernst","doi":"10.1109/ESSDERC.2015.7324735","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324735","url":null,"abstract":"This paper presents a thorough investigation of the longitudinal gauge factor (GF) at high doping level in columnar polycrystalline-Silicon (poly-Si) nanowire (NW) NEMS devices. It is shown that a high GF (more than 30) can be obtained with concentration about 1020 cm-3. This result is very promising for high volume, low fabrication cost NEMS devices. This high GF is due to the specific piezoresistive behavior of poly-Si when compared to c-Si. We modeled the mechanical properties of the poly-Si and compared them to electrical measurements in order to predict the optimum dopant concentration for high GF. The experimental extraction of the GF has been performed directly on NWs gauge thanks to a new non-destructive method presented in [1].","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130269080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-frequency noise in bare SOI wafers: Experiments and model 裸SOI晶圆中的低频噪声:实验与模型
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324770
L. Pirro, I. Ionica, S. Cristoloveanu, G. Ghibaudo
{"title":"Low-frequency noise in bare SOI wafers: Experiments and model","authors":"L. Pirro, I. Ionica, S. Cristoloveanu, G. Ghibaudo","doi":"10.1109/ESSDERC.2015.7324770","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324770","url":null,"abstract":"Noise measurements are efficient for interface trap density characterization in MOSFETs and can be extended to bare silicon-on-insulator wafers. A physical model to explain the experimental results will be presented. The impact of measurement parameters, like die area and probe distance, is discussed comparing experimental and calculated characteristics. Important clarifications concerning the effective die area contributing to noise response will be pointed out.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128244587","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Antenna-coupled single-metal thermocouple array for energy harvesting 用于能量收集的天线耦合单金属热电偶阵列
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324720
G. Szakmany, A. Orlov, G. Bernstein, W. Porod
{"title":"Antenna-coupled single-metal thermocouple array for energy harvesting","authors":"G. Szakmany, A. Orlov, G. Bernstein, W. Porod","doi":"10.1109/ESSDERC.2015.7324720","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324720","url":null,"abstract":"We study the generation of thermoelectricity by arrays of antenna-coupled nanothermocouples (ACNTCs) in response to long-wave infrared radiation. An ACNTC is constructed from a dipole antenna and a nanoscale thermocouple (NTC). The NTCs are based on a newly discovered thermoelectric effect in single-metal nanostructures with cross-sectional discontinuity. Dependences on antenna array size and polarization are investigated. We show that large arrays of ACNTCs are capable of converting optical energy to measurable electrical signals. This could open the possibility to use such devices for solar energy harvesting in the IR portion of the spectrum, which is inaccessible to photovoltaics.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133410884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Non-boolean computing based on linear waves and oscillators 基于线性波和振子的非布尔计算
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324723
G. Csaba, Á. Papp, W. Porod, R. Yeniceri
{"title":"Non-boolean computing based on linear waves and oscillators","authors":"G. Csaba, Á. Papp, W. Porod, R. Yeniceri","doi":"10.1109/ESSDERC.2015.7324723","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324723","url":null,"abstract":"We investigate, how linear or weakly nonlinear oscillatory systems (coupled nanoscale oscillators and propagating spin-waves) can be used as non-Boolean computing systems. We study two model systems: nearest-neighbor connected harmonic oscillators and propagating spin-waves. We argue that these systems may realize efficient co-processors for some demanding applications (image processing, associative memories, scientific computations), where digital CMOS solutions are notably inefficient. Wave-based processing architectures may use emerging nano-scale oscillators as device components, potentially surpassing end-of-roadmap CMOS performance.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115786533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Monolithically integrated optical random pulse generator in high voltage CMOS technology 高压CMOS技术中的单片集成光随机脉冲发生器
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-11-12 DOI: 10.1109/ESSDERC.2015.7324732
A. Khanmohammadi, R. Enne, M. Hofbauer, H. Zimmermann
{"title":"Monolithically integrated optical random pulse generator in high voltage CMOS technology","authors":"A. Khanmohammadi, R. Enne, M. Hofbauer, H. Zimmermann","doi":"10.1109/ESSDERC.2015.7324732","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324732","url":null,"abstract":"A monolithically integrated optoelectronic device is realized in 0.35um high voltage CMOS technology. It consists of a ring shaped single-photon avalanche diode (SPAD) around a Si-CMOS-LED to generate random events. The LED-emitted photons transmit through the short distance between the Si-LED and SPAD and some of them can be detected by the SPAD. In this device, time intervals between single-photon events are independent quantum random variables. Experimental results show an increase of more than a factor of three in the photon counting rate compared to earlier reported results.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128116112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
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