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Emerging nonvolatile memory (NVM) technologies 新兴的非易失性存储器(NVM)技术
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-09-01 DOI: 10.1109/ESSDERC.2015.7324725
An Chen
{"title":"Emerging nonvolatile memory (NVM) technologies","authors":"An Chen","doi":"10.1109/ESSDERC.2015.7324725","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324725","url":null,"abstract":"Significant progress has been made recently in emerging nonvolatile memories (NVMs). This paper will discuss advantages and challenges of several promising NVM devices, as well as their potential applications. Changing market trends toward mobile, IoT, and data-centric applications create new opportunities for NVMs. High-performance NVMs may enable novel architectures and designs, e.g., more uniform memory hierarchy, co-located logic and memory, and fine-grained power gating. Storage-class memories based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized to extend their applications beyond memory space, e.g., synaptic functions, security elements, etc.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126258497","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Mixed-domain compact modeling framework for fluid flow driven by electrostatic organic actuators 静电有机执行器驱动流体流动的混合域紧凑建模框架
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-09-01 DOI: 10.1109/ESSDERC.2015.7324711
T. Maiti, Lei Chen, H. Miyamoto, M. Miura-Mattausch, H. Mattausch
{"title":"Mixed-domain compact modeling framework for fluid flow driven by electrostatic organic actuators","authors":"T. Maiti, Lei Chen, H. Miyamoto, M. Miura-Mattausch, H. Mattausch","doi":"10.1109/ESSDERC.2015.7324711","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324711","url":null,"abstract":"A new modeling framework of an electrically driven fluid flow system for mixed-domain circuit simulation is reported. Coupling between electrical and fluidic domains is implemented by developing an organic actuator compact model. The actuator model is based on force balance spring-mass-damper system equation. Fluid compact model is derived from mass transport equation. The actuator and the fluid models are connected using circuit network. As an example, we applied the modeling framework for designing and optimizing an electrically driven blood flow system. We also compared the modeled results with finite element method (FEM) based numerical simulation.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127913030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Reliability aspects of TiSi-Schottky barrier diodes in a SiGe BiCMOS technology si -肖特基势垒二极管在SiGe BiCMOS技术中的可靠性方面
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 2015-09-01 DOI: 10.1109/ESSDERC.2015.7324757
A. Mai, A. Fox
{"title":"Reliability aspects of TiSi-Schottky barrier diodes in a SiGe BiCMOS technology","authors":"A. Mai, A. Fox","doi":"10.1109/ESSDERC.2015.7324757","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324757","url":null,"abstract":"Schottky barrier diodes (SBD) were integrated in a 0.25 μm SiGe BiCMOS technology. The SBDs were realized without additional process steps using the titanium silicide (TiSi) phase of the standard contact formation for the anode Schottky barrier. We observe a specific parameter degradation after reverse anode voltage operation. Different parameters as series resistance Rs, forward and leakage currents (IA, Ir) and design parameters like anode area, contact edge lengths and corners were evaluated in order to decrease this degradation. The on-resistance Ron and capacitance Coff were extracted by s-parameter measurements and show an obvious decreased degradation. Finally maximum reverse operating voltages for a ten year life time and a maximum change of 10% for critical parameters were extrapolated for the worst operation conditions.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128220292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Experimental evidences and simulations of trap generation along a percolation path 沿渗流路径形成圈闭的实验证据与模拟
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 1900-01-01 DOI: 10.1109/ESSDERC.2015.7324755
L. Gerrer, R. Hussin, S. Amoroso, J. Franco, P. Weckx, Marko Simicic, N. Horiguchi, B. Kaczer, T. Grasser, A. Asenov
{"title":"Experimental evidences and simulations of trap generation along a percolation path","authors":"L. Gerrer, R. Hussin, S. Amoroso, J. Franco, P. Weckx, Marko Simicic, N. Horiguchi, B. Kaczer, T. Grasser, A. Asenov","doi":"10.1109/ESSDERC.2015.7324755","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324755","url":null,"abstract":"In this paper we present experimental results of single trap impact on bulk MOSFETs, shedding light on counter intuitive behavior when increasing the gate bias. Using a well calibrated 3D TCAD model, statistical simulations at atomistic level are performed, demonstrating that the interactions between the traps and the percolation path are responsible for the unexpected bias dependences of the trap impact and therefore that a trap generation enhanced by higher current densities along this path can explain measured data.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121119468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
The defect-centric perspective of device and circuit reliability — From individual defects to circuits 以缺陷为中心的器件和电路可靠性观点——从单个缺陷到电路
2015 45th European Solid State Device Research Conference (ESSDERC) Pub Date : 1900-01-01 DOI: 10.1109/ESSDERC.2015.7324754
B. Kaczer, J. Franco, P. Weckx, P. Roussel, E. Bury, M. Cho, R. Degraeve, D. Linten, G. Groeseneken, H. Kukner, P. Raghavan, F. Catthoor, G. Rzepa, W. Gös, T. Grasser
{"title":"The defect-centric perspective of device and circuit reliability — From individual defects to circuits","authors":"B. Kaczer, J. Franco, P. Weckx, P. Roussel, E. Bury, M. Cho, R. Degraeve, D. Linten, G. Groeseneken, H. Kukner, P. Raghavan, F. Catthoor, G. Rzepa, W. Gös, T. Grasser","doi":"10.1109/ESSDERC.2015.7324754","DOIUrl":"https://doi.org/10.1109/ESSDERC.2015.7324754","url":null,"abstract":"As-fabricated (time-zero) variability and mean device aging are nowadays routinely considered in circuit simulations and design. Time-dependent variability (reliability variability) is an emerging trend that needs to be considered in circuit design as well. This phenomenon in deeply scaled devices can be best understood within the so-called defect-centric picture in terms of an ensemble of individual defects and their time, voltage, and temperature dependent properties. The properties of gate oxide defects are discussed and it is shown how these properties can be used to construct time-dependent variability distributions and can be propagated up to transistor-level circuits.","PeriodicalId":332857,"journal":{"name":"2015 45th European Solid State Device Research Conference (ESSDERC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121357182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
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