The defect-centric perspective of device and circuit reliability — From individual defects to circuits

B. Kaczer, J. Franco, P. Weckx, P. Roussel, E. Bury, M. Cho, R. Degraeve, D. Linten, G. Groeseneken, H. Kukner, P. Raghavan, F. Catthoor, G. Rzepa, W. Gös, T. Grasser
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引用次数: 19

Abstract

As-fabricated (time-zero) variability and mean device aging are nowadays routinely considered in circuit simulations and design. Time-dependent variability (reliability variability) is an emerging trend that needs to be considered in circuit design as well. This phenomenon in deeply scaled devices can be best understood within the so-called defect-centric picture in terms of an ensemble of individual defects and their time, voltage, and temperature dependent properties. The properties of gate oxide defects are discussed and it is shown how these properties can be used to construct time-dependent variability distributions and can be propagated up to transistor-level circuits.
以缺陷为中心的器件和电路可靠性观点——从单个缺陷到电路
预制(时间零)变异性和平均器件老化是目前电路仿真和设计中经常考虑的问题。时变可变性(可靠性可变性)是电路设计中需要考虑的一个新兴趋势。深度缩放器件中的这种现象可以在所谓的缺陷中心图中最好地理解为单个缺陷及其时间,电压和温度相关特性的集合。讨论了栅极氧化物缺陷的性质,并展示了这些性质如何用于构建随时间变化的分布,并可以传播到晶体管级电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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