2019 IEEE 13th International Conference on ASIC (ASICON)最新文献_第6页

Multi-Thread Assembling for Fast FEM Power Delivery DC Integrity Analysis 基于多线程装配的快速有限元输电直流完整性分析

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/ASICON47005.2019.8983609

Ke Yang, Shaoyi Peng, S. Tan, Hai-Bao Chen

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引用次数: 0

Design and implementation of Serial ATA pbysical layer on FPGA 串行ATA物理层在FPGA上的设计与实现

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/ASICON47005.2019.8983634

Xie Xie, Qinghua Duan, Jiafeng Liu, Jian Wang, Jinmei Lai

引用次数: 0

Deploying and Optimizing Convolutional Neural Networks on Heterogeneous Architecture 在异构架构上部署和优化卷积神经网络

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/ASICON47005.2019.8983456

Junning Jiang, Liang Cai, Feng Dong, Kehua Yu, Ke Chen, Wei Qu, Jianfei Jiang

引用次数: 1

A digitalized RRAM-based Spiking Neuron Network system with 3-bit weight and unsupervised online learning scheme 基于数字随机存储器的3位权和无监督在线学习机制的脉冲神经元网络系统

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/asicon47005.2019.8983603

Danqing Wu, Shilin Yan, Haodi Tang, Yu Wang, Jiayun Feng, Xianwu Hu, Jiaxin Cao, Yufeng Xie

引用次数: 0

A Grain-Adaptive Computing Structure for FPGA CNN Acceleration 一种FPGA CNN加速的粒度自适应计算结构

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/ASICON47005.2019.8983480

Xinyuan Qu, Zhihong Huang, Ning Mao, Yu Xu, Gang Cai, Zhen Fang

{"title":"A Grain-Adaptive Computing Structure for FPGA CNN Acceleration","authors":"Xinyuan Qu, Zhihong Huang, Ning Mao, Yu Xu, Gang Cai, Zhen Fang","doi":"10.1109/ASICON47005.2019.8983480","DOIUrl":"https://doi.org/10.1109/ASICON47005.2019.8983480","url":null,"abstract":"In recent years, because of its superior performance and outstanding accuracy, convolutional neural networks (CNNs) are widely used in high-tech applications such as image classification and speech recognition. But it is more and more difficult to implement CNN in hardware platform due to the scale of CNN is increasing rapidly. FPGA attracts more attention compared with other processors for its excellent balance of flexibility and efficiency. There are many FPGA-based CNN accelerators proposed by previous work. However, in previous work the computing resource (especially DSP) is not fully utilized, either explicitly or covertly, which affects the CNN accelerator's overall performance seriously. In this work, we propose a new formula that provides a more accurate and comprehensive analysis to evaluate computing resource utilization, which can provide guidance for CNN accelerator design optimization. Then we propose a grain-adaptive computing structure for FPGA-based CNN acceleration, which can change flexibly to suit to and optimally utilize the available DSP resource. Due to the improvement of DSP utilization, we can achieve a more satisfactory result for both overall throughput performance and power efficiency. This architecture is implemented on Xilinx xcku115 based on AlexNet, the frequency is 150MHz and the peak power consumption is 30.05W. The overall performance is 1292.40 GOPS, 43.01 GOP/s/W, resulting in 2.28X and 1.94X, 9.44X and 3.02X improvement compared to previous work [6], [9] correspondingly.","PeriodicalId":319342,"journal":{"name":"2019 IEEE 13th International Conference on ASIC (ASICON)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123281830","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

20, 000-fps Visual Motion Magnification on Pixel-parallel Vision Chip 像素并行视觉芯片上20000帧/秒的视觉运动放大

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/ASICON47005.2019.8983493

Junxian He, Xichuan Zhou, Yingcheng Lin, C. Sun, Cong Shi, N. Wu, Gang Luo

引用次数: 3

Solution Processed Metal Oxide in Emerging Electronic Devices 新兴电子器件中的溶液加工金属氧化物

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/asicon47005.2019.8983521

Chun Zhao, Cezhou Zhao, T. Zhao

引用次数: 0

MMV Subspace Pursuit (M-SP) Algorithm for Joint Sparse Multiple Measurement Vectors Recovery 联合稀疏多测量向量恢复的MMV子空间追踪算法

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/ASICON47005.2019.8983646

Sujuan Liu, Lili Zheng, Lei Liu, Qianjin Lin

引用次数: 0

An Inductorless 5-GHz Differential Dual Regulated Cross-Cascode Transimpedance Amplifier using 40 nm CMOS 采用40nm CMOS的无电感5 ghz差分双稳压跨级联码跨阻放大器

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/ASICON47005.2019.8983663

Bai Song Samuel Lee, Hang-Ji Liu, Xiaopeng Yu, Jer-Ming Chen, K. Yeo

引用次数: 3

Flat Pass-Band Method with Two RC Band-Stop Filters for 4-Stage Passive RC Polyphase Filter in Low-IF Receiver Systems 低中频接收系统中4级无源RC多相滤波器的双RC带阻滤波器平通带方法

2019 IEEE 13th International Conference on ASIC (ASICON) Pub Date : 2019-10-01 DOI: 10.1109/ASICON47005.2019.8983611

MinhTri Tran, Nene Kushita, A. Kuwana, Haruo Kobayashi

引用次数: 8