{"title":"Multi-Thread Assembling for Fast FEM Power Delivery DC Integrity Analysis","authors":"Ke Yang, Shaoyi Peng, S. Tan, Hai-Bao Chen","doi":"10.1109/ASICON47005.2019.8983609","DOIUrl":null,"url":null,"abstract":"Power integrity analysis is of great significance in the field of circuit design, especially the design of modern high speed circuit system. For the high performance printed circuit boards (PCBs) and IC design, power delivery network DC integrity checks play an important role. However, the element assembling process in finite element method (FEM) can take significant portion of total computing time. In this paper, a fast finite element assembling method for power network DC integrity checks of PCBs is proposed. We divided the mesh into a serious of bins and elements in different bins could be assembled in parallel. Further more, a dynamic circle shape approximation method is introduced to further control the number of elements due to vias and circular objectives. As a result, the new solver can easily perform progressive trade off between speed and accuracy. Experimental results of two PCB examples on a 3.6-GHz Intel i7 Dual-core CPU show that the proposed multi-thread assembling method can achieve 2X speedup over existing single-thread assembling methods. A dynamic circle shape approximation method is introduced to further control the number of elements and speed up the solver process. The resulting FEM solver leads to 3X speed over a commercial power integrity solver with no more than 0.7% errors.","PeriodicalId":319342,"journal":{"name":"2019 IEEE 13th International Conference on ASIC (ASICON)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 13th International Conference on ASIC (ASICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON47005.2019.8983609","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Power integrity analysis is of great significance in the field of circuit design, especially the design of modern high speed circuit system. For the high performance printed circuit boards (PCBs) and IC design, power delivery network DC integrity checks play an important role. However, the element assembling process in finite element method (FEM) can take significant portion of total computing time. In this paper, a fast finite element assembling method for power network DC integrity checks of PCBs is proposed. We divided the mesh into a serious of bins and elements in different bins could be assembled in parallel. Further more, a dynamic circle shape approximation method is introduced to further control the number of elements due to vias and circular objectives. As a result, the new solver can easily perform progressive trade off between speed and accuracy. Experimental results of two PCB examples on a 3.6-GHz Intel i7 Dual-core CPU show that the proposed multi-thread assembling method can achieve 2X speedup over existing single-thread assembling methods. A dynamic circle shape approximation method is introduced to further control the number of elements and speed up the solver process. The resulting FEM solver leads to 3X speed over a commercial power integrity solver with no more than 0.7% errors.