{"title":"Landing Radar Technology at the Jet Propulsion Laboratory: Mars Science Laboratory and Beyond","authors":"B. Pollard","doi":"10.1109/CSICS.2012.6340111","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340111","url":null,"abstract":"Safe landing on planetary bodies has traditionally been accomplished via radar systems, which have advantages of performing independent of lighting conditions, and of being far less susceptible to dust and other contaminant interactions than optical systems. At the Jet Propulsion Laboratory, we have an active program in the development of landing radar systems for both current missions (i.e. the Mars Science Laboratory) and for future mission concepts (hazard detection and avoidance, pinpoint landing). This article gives an overview of these systems and their driving technologies, including the key microwave circuit developments necessary to enable a future class of sensors.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129445600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Khalil, J. Wilson, B. Dupaix, S. Balasubramanian, G. Creech
{"title":"Toward Millimeter-Wave DACs: Challenges and Opportunities","authors":"W. Khalil, J. Wilson, B. Dupaix, S. Balasubramanian, G. Creech","doi":"10.1109/CSICS.2012.6340078","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340078","url":null,"abstract":"As line widths in emerging III-V technologies approaching that of modern CMOS, the conception of high performance mixed signal designs such as digital to analog converters (DACs) in the mm-wave space becomes possible. While addressing the speed limitations, candidate III-Vs (InP, GaAs and GaN) are known to suffer from increased switching power consumption, limited device yield and absolute accuracy. CMOS, on the other hand, has the benefit of low-power digital switching, fine resolution and scalability. Recent attempts in marrying the two technologies have been carried out in the DARPA COSMOS program, by integrating III-V type devices with CMOS circuits, so as to exploit the advantages of low-power digital CMOS and high-speed high-power InP. This paper presents some of the challenges as well as prospects in designing record speed and performance DACs in the COSMOS program while contrasting it to that of deeply-scaled CMOS. A multi-phase parallel DAC architecture is leveraged for ultra-wideband synthesis, to improve noise performance and achieve higher information rates. The architectural bounds between CMOS and InP as well as detailed circuit-level analysis of critical block elements will be highlighted.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132735809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A High IIP3, 50 GSamples/s Track and Hold Amplifier in 0.25 µm InP HBT Technology","authors":"S. Daneshgar, Z. Griffith, M. Rodwell","doi":"10.1109/CSICS.2012.6340112","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340112","url":null,"abstract":"A 50 GSamples/s track and hold amplifier (THA) is designed and fabricated in a 0.25 μm InP HBT technology. High speed switching functionality in the amplifier is achieved using Base-Collector diodes rather than switched-emitter-followers (SEF). Operating with -5 V and -2.5 V supplies, it achieves IIP3 more than +16 dBm up to 22 GHz. An HD3 of -30.3 dB is measured at +7.5 dBm input power which is P1dB point of THA at 15 GHz. Time domain measurement verifies the sampling rate of 50 GSamples/s in the THA.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"214 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123266688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Doherty Power Amplifier Design in Gallium Nitride Technology Using a Nonlinear Vector Network Analyzer and X-Parameters","authors":"T. Nielsen, M. Dieudonne, C. Gillease, D. Root","doi":"10.1109/CSICS.2012.6340105","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340105","url":null,"abstract":"This paper presents a complete Doherty power amplifier design that has been developed entirely inside the circuit simulator, but using nonlinear vector network analyzer data and measured X-parameter models. A high-power nonlinear measurement setup with active load-pull capabilities is presented and used to extract X-parameters of a commercially available Gallium Nitride power transistor. From fundamental and harmonic impedance tuning of the measured X-parameter models, main and auxiliary amplifier matching networks are designed and proper splitter/combiner circuitry is developed to achieve optimum Doherty output power and power added efficiency. A first-pass design success (only one fabrication build is required to meet design specifications) is confirmed by measurements of the fabricated power amplifier.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126570421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Hori, A. Wentzel, M. Hayakawa, W. Heinrich, K. Kunihiro
{"title":"A Watt-Class Digital Transmitter with a Voltage-Mode Class-S Power Amplifier and an Envelope Delta-Sigma Modulator for 450 MHz Band","authors":"S. Hori, A. Wentzel, M. Hayakawa, W. Heinrich, K. Kunihiro","doi":"10.1109/CSICS.2012.6340086","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340086","url":null,"abstract":"A single-bit high efficiency watt-class digital transmitter for the 450 MHz band is presented, using a GaN voltage-mode class-S power amplifier and a CMOS envelope ΔΣ modulator. The transmitter achieves 1.1 W output power with 69% drain efficiency for a 400 MHz WCDMA uplink signal, thus meeting the 3GPP specifications for ACLR. A power control from 0.45 W to 1.8 W is achieved by changing the supply voltage of the power amplifier from 20 V to 40 V, keeping the drain efficiency beyond 58% without any degradation of ACLR.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131158373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A High Efficiency 780 MHz GaN Envelope Tracking Power Amplifier","authors":"J. Yan, P. Theilmann, D. Kimball","doi":"10.1109/CSICS.2012.6340093","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340093","url":null,"abstract":"A high efficiency GaN envelope tracking power amplifier (ETPA) operated at 780 MHz, corresponding to LTE band class 14, is presented. The ETPA was tested with both a 6.6 dB PAPR WCDMA signal and a 7.5 dB PAPR 10 MHz 16 QAM LTE signal. Under the WCDMA signal, a drain efficiency of ~70% with 13.5 dB of gain and 28.6 W of output power was measured. The corresponding NRMSE, ACPR1, and ACPR2 were 1.51%, -45 dBc, and -51 dBc, respectively. For the 10 MHz LTE signal, a drain efficiency of 60% with 13.6 dB of gain and 23W of output power was measured. The corresponding EVM, ACPR1, and ACPR2 were 3%, -45 dBc, and -46 dBc, respectively. Using DPD that corrects for memory effects, results that meet the standard's specifications were obtained. To the best of the author's knowledge, the efficiency values presented here set a new record for power amplifier performance under high PAPR signals for both 5 MHz and 10 MHz modulation bandwidth signals.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117316897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Steinbeiser, K. Dinh, A. Chiu, M. Coutant, O. Krutko, M. Tessaro
{"title":"100 Gb/s Optical DP-QPSK Using Two Surface Mount Dual Channel Modulator Drivers","authors":"C. Steinbeiser, K. Dinh, A. Chiu, M. Coutant, O. Krutko, M. Tessaro","doi":"10.1109/CSICS.2012.6340054","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340054","url":null,"abstract":"A dual channel broadband surface mount optical modulator driver has been developed for use in 100Gb/s fiber optic transponders. Each channel is capable of delivering 4 to 8Vpp to each port of the optical modulator at data rates spanning through 43Gb/s with adjustable crossing point and eye quality control. This surface mount package solution enables a more compact system design and use of simple low cost surface mount assembly processes, eliminating the need for expensive connectorized driver and MUX module solutions and eliminating the need for expensive SMPM RF cable interconnects, which are key requirements for next generation 100Gb/s transponders.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"457 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116025375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Shinohara, D. Regan, A. Corrion, D. Brown, I. Alvarado-Rodoriguez, M. Cunningham, C. Butler, A. Schmitz, S. Kim, B. Holden, D. Chang, V. Lee, P. Asbeck
{"title":"Deeply-Scaled E/D-Mode GaN-HEMTs for Sub-mm-Wave Amplifiers and Mixed-Signal Applications","authors":"K. Shinohara, D. Regan, A. Corrion, D. Brown, I. Alvarado-Rodoriguez, M. Cunningham, C. Butler, A. Schmitz, S. Kim, B. Holden, D. Chang, V. Lee, P. Asbeck","doi":"10.1109/CSICS.2012.6340075","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340075","url":null,"abstract":"In this paper, we report state-of-the-art high-frequency performance of GaN-based HEMTs achieved through innovative device scaling technologies such as vertically-scaled AlN/GaN/AlGaN double-heterojunction (DH) HEMT epitaxial structure, low-resistance n+-GaN ohmic contacts regrown by MBE, and manufacturable 20-nm self-aligned sidewall gate process. Engineering top barrier layer structure enabled both enhancement- and depletion-mode (E/D) device operations with record cutoff frequencies while maintaining Johnson figure of merit (JFoM) breakdown performance. Furthermore, E/D-mode devices were monolithically integrated using a full epitaxial regrowth technique with a successful demonstration of DCFL ring oscillator circuits. Deeply-scaled E/D-mode GaN-HEMTs with an unprecedented combination of high-frequency and high-breakdown characteristics offer practical advantages in circuit applications such as sub-millimeter-wave power amplifiers, ultra-linear mixers, and increased output power digital-to-analog converters.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121012158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Byeon, I. Song, S. Cho, H. Kim, C. Lee, C. Park
{"title":"A 60 GHz Variable Gain Amplifier with a Low Phase Imbalance in 0.18 μm SiGe BiCMOS Technology","authors":"C. Byeon, I. Song, S. Cho, H. Kim, C. Lee, C. Park","doi":"10.1109/CSICS.2012.6340101","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340101","url":null,"abstract":"A 60GHz variable gain amplifier is designed and fabricated in 0.18 μm SiGe BiCMOS technology. A phase compensation technique is employed for the minimization of the phase imbalance at different gain states. With a 3.3 V supply, the amplifier achieves a variable gain ranging from -2.7 dB to 17.7 dB at 60 GHz, consuming DC power of 50 mW. The measured RMS phase imbalance is less than 2.8° at 57-66 GHz of the 60 GHz full band. The output 1-dB gain compression point is >; 2 dBm for all of the gain states at 60 GHz.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115433435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Cheney, R. Deist, J. Navales, B. Gila, F. Ren, S. Pearton
{"title":"Determination of the Reliability of AlGaN/GaN HEMTs through Trap Detection Using Optical Pumping","authors":"D. Cheney, R. Deist, J. Navales, B. Gila, F. Ren, S. Pearton","doi":"10.1109/CSICS.2012.6340104","DOIUrl":"https://doi.org/10.1109/CSICS.2012.6340104","url":null,"abstract":"When illuminated with below band-gap light, the response of the drain current of AlGaN/GaN High Electron Mobility Transistors (HEMTs) was measured. The energy of the wavelength of light corresponds to the trapping and de-trapping of carriers within the band-gap, providing an indicator of trap densities. These changes were compared on HEMTs with gate lengths of 0.14 & 0.17 μm, before and after electrically stressing under on-state (VG = 0 V), off-state (VG =-5 V), and typical operating conditions (VG = -2V) indicating a change in trap density as a result of electrical stressing, since the energy from a specific wavelength of light pumps traps whose activation energies are less than or equal to that of the light source. Changes in trap densities were minimal after both off-state and on-state stressing but significant trap creation in the range EC=-0.4-0.6 eV were observed in HEMTs exhibiting gradual degradation during stressing. Energy levels corresponding to these values in the literature have been suggested to correlate GaN and NGa substitutional defects, as well as GaI interstitials.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127946015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}