W. Khalil, J. Wilson, B. Dupaix, S. Balasubramanian, G. Creech
{"title":"迈向毫米波dac:挑战与机遇","authors":"W. Khalil, J. Wilson, B. Dupaix, S. Balasubramanian, G. Creech","doi":"10.1109/CSICS.2012.6340078","DOIUrl":null,"url":null,"abstract":"As line widths in emerging III-V technologies approaching that of modern CMOS, the conception of high performance mixed signal designs such as digital to analog converters (DACs) in the mm-wave space becomes possible. While addressing the speed limitations, candidate III-Vs (InP, GaAs and GaN) are known to suffer from increased switching power consumption, limited device yield and absolute accuracy. CMOS, on the other hand, has the benefit of low-power digital switching, fine resolution and scalability. Recent attempts in marrying the two technologies have been carried out in the DARPA COSMOS program, by integrating III-V type devices with CMOS circuits, so as to exploit the advantages of low-power digital CMOS and high-speed high-power InP. This paper presents some of the challenges as well as prospects in designing record speed and performance DACs in the COSMOS program while contrasting it to that of deeply-scaled CMOS. A multi-phase parallel DAC architecture is leveraged for ultra-wideband synthesis, to improve noise performance and achieve higher information rates. The architectural bounds between CMOS and InP as well as detailed circuit-level analysis of critical block elements will be highlighted.","PeriodicalId":290079,"journal":{"name":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Toward Millimeter-Wave DACs: Challenges and Opportunities\",\"authors\":\"W. Khalil, J. Wilson, B. Dupaix, S. Balasubramanian, G. Creech\",\"doi\":\"10.1109/CSICS.2012.6340078\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As line widths in emerging III-V technologies approaching that of modern CMOS, the conception of high performance mixed signal designs such as digital to analog converters (DACs) in the mm-wave space becomes possible. While addressing the speed limitations, candidate III-Vs (InP, GaAs and GaN) are known to suffer from increased switching power consumption, limited device yield and absolute accuracy. CMOS, on the other hand, has the benefit of low-power digital switching, fine resolution and scalability. Recent attempts in marrying the two technologies have been carried out in the DARPA COSMOS program, by integrating III-V type devices with CMOS circuits, so as to exploit the advantages of low-power digital CMOS and high-speed high-power InP. This paper presents some of the challenges as well as prospects in designing record speed and performance DACs in the COSMOS program while contrasting it to that of deeply-scaled CMOS. A multi-phase parallel DAC architecture is leveraged for ultra-wideband synthesis, to improve noise performance and achieve higher information rates. The architectural bounds between CMOS and InP as well as detailed circuit-level analysis of critical block elements will be highlighted.\",\"PeriodicalId\":290079,\"journal\":{\"name\":\"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS.2012.6340078\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2012.6340078","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
摘要
随着新兴III-V技术的线宽接近现代CMOS,高性能混合信号设计的概念,如毫米波空间的数模转换器(dac)成为可能。在解决速度限制的同时,已知候选iii - v (InP, GaAs和GaN)存在开关功耗增加,器件良率和绝对精度有限的问题。另一方面,CMOS具有低功耗数字开关、精细分辨率和可扩展性的优点。最近,DARPA COSMOS计划尝试将这两种技术结合起来,将III-V型器件与CMOS电路集成,从而利用低功耗数字CMOS和高速大功率InP的优势。本文介绍了在COSMOS程序中设计创纪录速度和性能的dac的一些挑战和前景,并将其与深尺度CMOS进行了比较。多相并行DAC架构用于超宽带合成,以改善噪声性能并实现更高的信息速率。将重点介绍CMOS和InP之间的架构界限以及关键模块元件的详细电路级分析。
Toward Millimeter-Wave DACs: Challenges and Opportunities
As line widths in emerging III-V technologies approaching that of modern CMOS, the conception of high performance mixed signal designs such as digital to analog converters (DACs) in the mm-wave space becomes possible. While addressing the speed limitations, candidate III-Vs (InP, GaAs and GaN) are known to suffer from increased switching power consumption, limited device yield and absolute accuracy. CMOS, on the other hand, has the benefit of low-power digital switching, fine resolution and scalability. Recent attempts in marrying the two technologies have been carried out in the DARPA COSMOS program, by integrating III-V type devices with CMOS circuits, so as to exploit the advantages of low-power digital CMOS and high-speed high-power InP. This paper presents some of the challenges as well as prospects in designing record speed and performance DACs in the COSMOS program while contrasting it to that of deeply-scaled CMOS. A multi-phase parallel DAC architecture is leveraged for ultra-wideband synthesis, to improve noise performance and achieve higher information rates. The architectural bounds between CMOS and InP as well as detailed circuit-level analysis of critical block elements will be highlighted.