Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)最新文献_第3页

Bias stress in pentacene transistors measured by four probe transistor structures 用四探针晶体管结构测量并五苯晶体管的偏置应力

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356577

Jan Genoe, S. Steudel, S. De Vusser, S. Verlaak, D. Janssen, P. Heremans

引用次数: 16

A comprehensive study of corner effects in tri-gate transistors 三栅极晶体管拐角效应的综合研究

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356515

M. Stadele, R. J. Luyken, M. Roosz, M. Specht, W. Rosner, L. Dreeskornfeld, J. Hartwich, F. Hofmann, J. Kretz, E. Landgraf, L. Risch

引用次数: 41

Investigations on possible occurrence of ballistic transport in different NMOS architectures 不同NMOS结构中可能发生弹道输运的研究

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356533

R. Clerc, M. Ferrier, F. Daugé, G. Ghibaudo, F. Boeuf, T. Skotnicki

引用次数: 2

Space-charge-limited current conductions in La/sub 2/O/sub 3/ thin films deposited by e-beam evaporation after low temperature dry-nitrogen annealing [gate oxide applications] 低温干氮退火后电子束蒸发沉积La/sub 2/O/sub 3薄膜的空间电荷限制电流传导[栅极氧化物应用]

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356493

Y. Kim, S. Ohmi, K. Tsutsui, H. Iwai

引用次数: 3

Vertical tunnel field-effect transistor with bandgap modulation and workfunction engineering 带隙调制垂直隧道场效应晶体管及工作函数工程

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356534

K. Bhuwalka, J. Schulze, I. Eisele

{"title":"Vertical tunnel field-effect transistor with bandgap modulation and workfunction engineering","authors":"K. Bhuwalka, J. Schulze, I. Eisele","doi":"10.1109/ESSDER.2004.1356534","DOIUrl":"https://doi.org/10.1109/ESSDER.2004.1356534","url":null,"abstract":"A MBE grown vertical tunnel FET, based on band-to-band tunneling, has already been proposed. Based on Si, it showed some remarkable properties. However, it failed to meet the technology requirements in terms of on-current and threshold voltage. Improvement in the n-channel device performance by bandgap modulation at the tunneling junction using a thin /spl delta/p/sup +/ SiGe layer has been shown. However, as the germanium mole fraction is increased in SiGe, even though the on-current threshold voltage and sub-threshold swing, S, all show improved behavior, the leakage current is seen to increase significantly as tunneling probability becomes significant even at zero gate bias. In this work, we further present the improvement in the device performance using gate workfunction engineering along with bandgap modulation at the tunnel junction. As bandgap modulation leads to improved S and can be scaled to below 60 mV/dec independent of temperature we show, by means of 2D computer simulations, that it is possible to achieve very low off-currents and very high on-currents for the tunnel FET.","PeriodicalId":287103,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123175558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 16

Monolithic CMOS detector module for photon counting and picosecond timing 用于光子计数和皮秒计时的单片CMOS检测器模块

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356559

F. Zappa, S. Tisa, A. Gulinatti, A. Gallivanoni, S. Cova

引用次数: 34

Influence of self heating in a BiCMOS on SOI technology BiCMOS自热对SOI技术的影响

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356558

E. Haralson, B. Malm, T. Johansson, M. Ostling

引用次数: 7

Mobility issues in ultra-thin SOI MOSFETs: thickness variations, GIFBE and coupling effects 超薄SOI mosfet的迁移率问题:厚度变化、GIFBE和耦合效应

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356500

A. Ohata, M. Cassé, S. Cristoloveanu, T. Poiroux

引用次数: 5

Successful integration of an ultra low thermal budget process solution based on solid phase epitaxy for sub-50nm CMOS technologies 成功集成了一种基于亚50nm CMOS技术固相外延的超低热预算工艺解决方案

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356507

R. El Farhane, A. Pouydebasque, C. Laviron, P. Morin, F. Arnaud, P. Stolk, F. Boeuf, T. Skotnicki, D. Bensahel, A. Halimaoui

引用次数: 2

Depletion-all-around in SOI G/sup 4/-FETs: a conduction mechanism with high performance SOI G/sup /- fet的全耗尽:一种高性能导通机制

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI: 10.1109/ESSDER.2004.1356528

K. Akarvardar, S. Cristoloveanu, P. Gentil, B. Blalock, B. Dufrene, M. Mojarradi

引用次数: 10