2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)最新文献

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Local Modification of Defective Edge Hamiltonian for Graphene Nanoribbon Devices 石墨烯纳米带器件缺陷边哈密顿量的局部修正
Shizhuo Ye, Sheng Chang, Hao Wang, Qijun Huang, Jin He, Yawei Lv, Chun Wei
{"title":"Local Modification of Defective Edge Hamiltonian for Graphene Nanoribbon Devices","authors":"Shizhuo Ye, Sheng Chang, Hao Wang, Qijun Huang, Jin He, Yawei Lv, Chun Wei","doi":"10.1109/EDSSC.2018.8487109","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487109","url":null,"abstract":"The impact of edge defect on C-C bond is revealed to be localized in short range by ab initio calculation. Thus we propose a local modification method to construct the tight-bind (TB) Hamiltonian. Except for the edge parameter correction, this method considers the local C-C bond distortion and the diversity of different armchair GNRs. It is demonstrated that this method significantly reduces TB fitting errors with two typical GNR edge defects. In addition, using the modified Hamiltonian, device simulation results are shown.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125618248","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Ultrahigh-Frequency Characteristics of Single-Electron Transistor 单电子晶体管的超高频特性
H. Inokawa, T. Nishimura, Alka Singh, H. Satoh, Yasuo Takahashi
{"title":"Ultrahigh-Frequency Characteristics of Single-Electron Transistor","authors":"H. Inokawa, T. Nishimura, Alka Singh, H. Satoh, Yasuo Takahashi","doi":"10.1109/EDSSC.2018.8487153","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487153","url":null,"abstract":"High-frequency rectifying characteristics of single-electron transistor (SET) is analyzed by simulation based on the time-dependent master equation. The experimental finding of the operation far beyond the conventional cutoff frequency set by the CR time constant is reconfirmed successfully, and the mechanism behind the phenomena is clarified. The result strongly suggests that SET becomes an important rectifier at ultrahigh frequencies where conventional devices cannot operate.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132619013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Ti Film Thickness Influences on the Back Channel Etched Amorphous InGaZnO4 Thin Film Transistors Ti膜厚度对后通道蚀刻非晶InGaZnO4薄膜晶体管的影响
Letao Zhang, Xiaoliang Zhou, Hongyu He, Yang Shao, Shengdong Zhang
{"title":"Ti Film Thickness Influences on the Back Channel Etched Amorphous InGaZnO4 Thin Film Transistors","authors":"Letao Zhang, Xiaoliang Zhou, Hongyu He, Yang Shao, Shengdong Zhang","doi":"10.1109/EDSSC.2018.8487167","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487167","url":null,"abstract":"Back channel etched (BCE) amorphous InGaZnO4(a–IGZO) thin film transistors are fabricated, in which Ti thin film is employed as a protective layer for a-IGZO. The optimal Ti thickness is found to be 4-5 nm, and a-IGZO will be well protected and excellent transfer curves can be obtained after O2 plasma and annealing treatment. Besides, by the introduction of the Ti layer, the devices obtain better stress stability.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131215294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Research on Current Sharing Method of SiC MOSFET Parallel Modules SiC MOSFET并联模块电流分担方法研究
Chengwu Hui, Yuan Yang, Yafei Xue, Yang Wen
{"title":"Research on Current Sharing Method of SiC MOSFET Parallel Modules","authors":"Chengwu Hui, Yuan Yang, Yafei Xue, Yang Wen","doi":"10.1109/EDSSC.2018.8487112","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487112","url":null,"abstract":"This work analyzes current sharing methods for SiC MOSFETs in parallel. A novel method of combination gate resistance compensation with coupling inductance is presented. The different methods including series resistance, coupled inductance and combination the gate resistance compensation with coupling inductance are simulated under static and dynamic conditions for SiC MOSFETs in parallel. The results show that the current imbalance is reduced from 10.9% to 1.47% by means of the current sharing method of combination the gate resistance compensation with coupling inductance.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130848616","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
An On-Chip Oscillator with Comparator Offset Cancellation 具有比较器偏移抵消的片上振荡器
Dewei Zhang, Ruijun Zhang, Hesheng Lin, Qinghua Wang, M. Zhang
{"title":"An On-Chip Oscillator with Comparator Offset Cancellation","authors":"Dewei Zhang, Ruijun Zhang, Hesheng Lin, Qinghua Wang, M. Zhang","doi":"10.1109/EDSSC.2018.8487131","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487131","url":null,"abstract":"This work presents an on-chip oscillator with offset cancellation in $0.25~mu mathrm {m}$ process. By automatically choosing the reference voltage in a single comparator, the proposed oscillator can perfectly achieve offset cancellation. In addition, it reduces the comparator count from two to one for area-saving and power-saving. The simulation results exhiUit a Temperature Coefficient of 2.3 ppm/oC from -40 to $90~^{circ} mathrm {c}$ while consuming $6.5~mu W$ at 30 kHz.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133313915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-power High-speed Dynamic Comparator Using a New Regenerative Stage 一种新型再生级的低功耗高速动态比较器
Yao Wang, Huiming Yang, Wenbing Fan, J. Liou
{"title":"Low-power High-speed Dynamic Comparator Using a New Regenerative Stage","authors":"Yao Wang, Huiming Yang, Wenbing Fan, J. Liou","doi":"10.1109/EDSSC.2018.8487139","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487139","url":null,"abstract":"A low-power, high-speed, double-tail dynamic comparator is presented. It adopts a new regenerative stage using separated gate-biasing cross-coupled transistors instead of the conventional cross-coupled invertor structure. The effective total transconductance of the regenerative stage is enhanced at the beginning of the regeneration, leading to a much faster comparison and lower energy consumption. The effectiveness of the new and improved structure was verified with simulations.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115838045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Novel Comparator Offset Calibration Technique for SAR ADCs 一种新的SAR adc比较器偏置校准技术
X. Peng, A. Gao, Zheng Chen, Haosong Zhang, Yuefeng Li, Wenzhen Cao, Xiaoqiao Liu, H. Tang
{"title":"A Novel Comparator Offset Calibration Technique for SAR ADCs","authors":"X. Peng, A. Gao, Zheng Chen, Haosong Zhang, Yuefeng Li, Wenzhen Cao, Xiaoqiao Liu, H. Tang","doi":"10.1109/EDSSC.2018.8487062","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487062","url":null,"abstract":"This paper proposes a novel comparator offset calibration technique for SAR ADCs. We realize the calibration in CDAC instead of the comparator circuit, so that the power consumption, area and circuit complexity barely increase, which is a big advantage compared to traditional ones. A 10-bit 100Msps SAR ADC applying our offset calibration is designed in a 55nm CMOS process. The post simulation results show that the ENOB achieves 9.5 bits and consumes a power of 4.4mW at the sampling rate of 100MHz.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124193532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A Low-Power Single-Chip Internet of Things Transponder with Energy Harvesting 具有能量收集功能的低功耗单芯片物联网应答器
Bing Li, Wei Wang, Jia Liu, Pi-Zhou Ye, Qian Yang, Jin-Fei Ding
{"title":"A Low-Power Single-Chip Internet of Things Transponder with Energy Harvesting","authors":"Bing Li, Wei Wang, Jia Liu, Pi-Zhou Ye, Qian Yang, Jin-Fei Ding","doi":"10.1109/EDSSC.2018.8487144","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487144","url":null,"abstract":"A low-power single-chip Internet of things transponder that provides automotive security passive keyless entry is presented. To guarantee high reliability under poor conditions, the transponder can switch the power supply between the low-frequency field and its internal battery seamlessly when using the proposed intelligent power management scheme. Measurement results show the improved full-wave rectifier produces 72% high-efficiency conversion from low-frequency AC to DC voltage for energy harvesting, and an enhanced amplitude-shift keying demodulation guarantees reliable data transmission at low power.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"121 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116287059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Novel Cascode Mixer for NB-IoT Transceiver System in 65nm CMOS 一种新型65nm CMOS级联混频器用于NB-IoT收发器系统
Pengyi Cao, Xinpeng Xing, Haigang Feng, Zhihua Wang
{"title":"A Novel Cascode Mixer for NB-IoT Transceiver System in 65nm CMOS","authors":"Pengyi Cao, Xinpeng Xing, Haigang Feng, Zhihua Wang","doi":"10.1109/EDSSC.2018.8487163","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487163","url":null,"abstract":"NB-IoT is a FDD system. Its TX & RX are operated at a fixed frequency offset at the same time. Conventional architecture builds 2 PLLs to support FDD. This paper presents a new architecture which only needs one PLL. Its receiver introduces a novel cascode-mixer structure (Cascaded by two current-mode passive mixers driven by 25% duty-cycle quadrature clocks). The cascode mixer makes two times mixing of RF signals using the LO1 produced by the PLL and the LO2 from the crystal reference. It achieves 18.7dB noise figure and +8.13 dBm IP1dB in simulation with a commercial 65nm RFCMOS process. It consumes 2.8mA from a 1.2V supply. IQ phase mismatch correction is also implemented in this design.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"93 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123575912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Photoluminescence of QD-PVA Film for Displays 显示用QD-PVA薄膜的光致发光研究
Miao Zhou, Dongze Li, Hsiaohsien Chen, Lixuan Chen, Hang Zhou
{"title":"Photoluminescence of QD-PVA Film for Displays","authors":"Miao Zhou, Dongze Li, Hsiaohsien Chen, Lixuan Chen, Hang Zhou","doi":"10.1109/EDSSC.2018.8487141","DOIUrl":"https://doi.org/10.1109/EDSSC.2018.8487141","url":null,"abstract":"We reported for the first time a method based on surface-modification of core/shell QDs (CdSe/CdS/ZnS) has shown its excellent dispersibility, colloidal stability, and high photoluminescence quantum yield which was dispersed in Polyvinyl Acetate (PVA) aqueous solution. Different transmitted spectrum of QD-PVA film with varies concentration of QDs, R/G ratio, and thicknesses have been shown. The QD-PVA film used as down-converters for back-lighting in liquid-crystal displays may improve color gamut, and improve the feature of water and oxygen resistance.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128729597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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