{"title":"64 GHz and 100 GHz VCOs in 90 nm CMOS using optimum pumping method","authors":"L. Franca-Neto, R. Bishop, B. Bloechel","doi":"10.1109/ISSCC.2004.1332785","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332785","url":null,"abstract":"A method to optimally pump energy from the transistors to the passive network is presented for the design of integrated 64 GHz and 100 GHz VCOs in 90 nm CMOS. The VCOs use an on-die distributed network, draw /spl sim/25 mA from a 1 V supply and produce oscillations with 0.4 Vp-p amplitudes. Phase noise is <-110 dBc/Hz at 10 MHz offset, and VCO gain is 2 GHz/V.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116398128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Khurram Muhammad, D. Leipold, Bogdan Staszewski, Y. Ho, C. Hung, K. Maggio, C. Fernando, T. Jung, J. Wallberg, Jinseok Koh, S. John, I. Deng, O. Moreira, R. Staszewski, Ran Katz, O. Friedman
{"title":"A discrete-time Bluetooth receiver in a 0.13/spl mu/m digital CMOS process","authors":"Khurram Muhammad, D. Leipold, Bogdan Staszewski, Y. Ho, C. Hung, K. Maggio, C. Fernando, T. Jung, J. Wallberg, Jinseok Koh, S. John, I. Deng, O. Moreira, R. Staszewski, Ran Katz, O. Friedman","doi":"10.1109/ISSCC.2004.1332697","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332697","url":null,"abstract":"A discrete-time receiver architecture for a wireless application is presented. Analog signal processing concepts are used to directly sample the RF input at Nyquist rate. Maximum receiver sensitivity is -83dBm and the chip consumes a total of 41mA from a 1.575V internally regulated supply. The receiver is implemented in a 0.13/spl mu/m digital CMOS process.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"27 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116424664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Kensall D. Wise, Khalil Najafi, Richard Sacks, E. Zellers
{"title":"A wireless integrated microsystem for environmental monitoring","authors":"Kensall D. Wise, Khalil Najafi, Richard Sacks, E. Zellers","doi":"10.1109/ISSCC.2004.1332780","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332780","url":null,"abstract":"A wireless sensing platform employing digital compensation, self-test, and distributed power management is reported. Using this platform, key portions of a gas chromatograph are integrated in less than 10cc, analyzing multi-component mixtures with detection limits below 1 ppb.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114521287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A high-voltage output driver in a standard 2.5 V 0.25 /spl mu/m CMOS technology","authors":"B. Serneels, T. Piessens, M. Stepert, W. Dehaene","doi":"10.1109/ISSCC.2004.1332636","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332636","url":null,"abstract":"A robust 7.5 V output driver is realized in standard 2.5 V 0.25 /spl mu/m CMOS. The chip delivers an output swing of 6.46 V to a 50 /spl Omega/ load with a 10 MHz input square wave. A dual-tone PWM signal at 70 kHz and 250 kHz results in an IM3 of -65 dBm. The on-resistance is 5.9 /spl Omega/.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125379987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 180mV FFT processor using subthreshold circuit techniques","authors":"Alice Wang, A. Chandrakasan","doi":"10.1109/ISSCC.2004.1332709","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332709","url":null,"abstract":"Minimizing energy requires scaling supply voltages below device thresholds. Logic and memory design techniques allowing subthreshold operation are developed and demonstrated. The fabricated 1024-point FFT processor operates down to 180mV using a standard 0.18/spl mu/m CMOS logic process while using 155nJ/FFT at the optimal operating point.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126934821","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Masamitsu Tanaka, F. Matsuzaki, T. Kondo, N. Nakajima, Y. Yamanashi, A. Fujimaki, H. Hayakawa, N. Yoshikawa, H. Terai, S. Yorozu
{"title":"A single-flux-quantum logic prototype microprocessor","authors":"Masamitsu Tanaka, F. Matsuzaki, T. Kondo, N. Nakajima, Y. Yamanashi, A. Fujimaki, H. Hayakawa, N. Yoshikawa, H. Terai, S. Yorozu","doi":"10.1109/ISSCC.2004.1332714","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332714","url":null,"abstract":"The complete operation of a microprocessor prototype based on the single-flux-quantum (SFQ) logic is described. The 8b SFQ microprocessor, fabricated using niobium Josephson-junction technology, performs computation at a 15.2GHz clock rate with power consumption of 1.6mW. The /spl mu/P contains 5000 Josephson junctions and 1300 cells on a 5mm/sup 2/ IC.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128082421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Uvieghara, M. Kuo, J. Arceo, J. Cheung, J. Lee, X. Niu, R. Sankuratri, M. Severson, O. Arias, Y. Chang, S. King, K. Lai, Y. Tian, S. Varadarajan, J. Wang, K. Yen, L. Yuan, N. Chen, D. Hsu, D. Lisk, S. Khan, A. Fahim, C.L. Wang, J. DeJaco, Z. Mansour, M. Sani
{"title":"A highly-integrated 3G CDMA2000 1X cellular baseband chip with GSM/AMPS/GPS/Bluetooth/multimedia capabilities and ZIF RIF support","authors":"G. Uvieghara, M. Kuo, J. Arceo, J. Cheung, J. Lee, X. Niu, R. Sankuratri, M. Severson, O. Arias, Y. Chang, S. King, K. Lai, Y. Tian, S. Varadarajan, J. Wang, K. Yen, L. Yuan, N. Chen, D. Hsu, D. Lisk, S. Khan, A. Fahim, C.L. Wang, J. DeJaco, Z. Mansour, M. Sani","doi":"10.1109/ISSCC.2004.1332774","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332774","url":null,"abstract":"This paper presents a 3G CDMA2000 1X cellular-baseband chip, with GSM/AMPS/GPS/Bluetooth/multimedia capabilities, which uses an embedded ARM and two DSP processors. It is implemented with 27 M transistors in 46.9 mm/sup 2/ using a 130 nm dual-V/sub T/ low-power CMOS process and achieves a three to four times standby-time improvement by the selective use of footswitches.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130347123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Amin, M. Grajcar, E. Ll'ichev, A. Izmalkov, A.M. van den Brink, G. Rose, A. Smirnov, A. Zagoskin
{"title":"Superconducting quantum storage and processing","authors":"M. Amin, M. Grajcar, E. Ll'ichev, A. Izmalkov, A.M. van den Brink, G. Rose, A. Smirnov, A. Zagoskin","doi":"10.1109/ISSCC.2004.1332711","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332711","url":null,"abstract":"Superposition and entanglement are the two quantum-mechanical effects required to build a quantum computer. Based on these effects, a method for building quantum circuits using superconducting flux quantum bits (qubits) that are inductively coupled to a high quality LC circuit is described.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134430360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Zargari, S. Jen, B. Kaczynski, M. Lee, M. Mack, S. Mehta, S. Mendis, K. Onodera, H. Samavati, W. Si, K. Singh, A. Tabatabaei, M. Terrovitis, D. Weber, D. Su, B. Wooley
{"title":"A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11a/b/g WLAN","authors":"M. Zargari, S. Jen, B. Kaczynski, M. Lee, M. Mack, S. Mehta, S. Mendis, K. Onodera, H. Samavati, W. Si, K. Singh, A. Tabatabaei, M. Terrovitis, D. Weber, D. Su, B. Wooley","doi":"10.1109/ISSCC.2004.1332611","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332611","url":null,"abstract":"A 2.4/5 GHz transceiver implements the RF and analog front-end of an IEEE 802.11a/g/b WLAN system in 0.25 /spl mu/m CMOS technology. The IC transmits 9 dBm/8 dBm EVM-compliant output power at 5 GHz/2.4 GHz for a 64QAM OFDM signal. The overall receiver NF is 5.5/4.5 dB at 5/2.4 GHz.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131120840","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 375 x 365 3D 1k frame/s range-finding image sensor with 394.5 kHz access rate and 0.2 subpixel accuracy","authors":"Y. Oike, M. Ikeda, K. Asada","doi":"10.1109/ISSCC.2004.1332622","DOIUrl":"https://doi.org/10.1109/ISSCC.2004.1332622","url":null,"abstract":"Row-parallel search architecture and focal plane processing using light sections acquires range images at 1052frames/s with accuracy of 1.1mm at 600mm distance. The 24-transistor, 11.25/spl mu/m pitch pixel with 28% fill factor is built in a 0.18/spl mu/m 1P5M CMOS process.","PeriodicalId":273317,"journal":{"name":"2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)","volume":"249 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128680778","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}