采用亚阈值电路技术的180mV FFT处理器

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519) Pub Date : 2004-09-13 DOI:10.1109/ISSCC.2004.1332709

Alice Wang, A. Chandrakasan

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引用次数: 246

摘要

最小化能量需要在设备阈值以下缩放电源电压。允许阈下操作的逻辑和存储器设计技术被开发和演示。制造的1024点FFT处理器使用标准的0.18/spl mu/m CMOS逻辑工艺工作到180mV，而在最佳工作点使用155nJ/FFT。

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A 180mV FFT processor using subthreshold circuit techniques

Minimizing energy requires scaling supply voltages below device thresholds. Logic and memory design techniques allowing subthreshold operation are developed and demonstrated. The fabricated 1024-point FFT processor operates down to 180mV using a standard 0.18/spl mu/m CMOS logic process while using 155nJ/FFT at the optimal operating point.

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来源期刊

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

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