A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11a/b/g WLAN

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519) Pub Date : 2004-09-13 DOI:10.1109/ISSCC.2004.1332611

M. Zargari, S. Jen, B. Kaczynski, M. Lee, M. Mack, S. Mehta, S. Mendis, K. Onodera, H. Samavati, W. Si, K. Singh, A. Tabatabaei, M. Terrovitis, D. Weber, D. Su, B. Wooley

引用次数: 69

Abstract

A 2.4/5 GHz transceiver implements the RF and analog front-end of an IEEE 802.11a/g/b WLAN system in 0.25 /spl mu/m CMOS technology. The IC transmits 9 dBm/8 dBm EVM-compliant output power at 5 GHz/2.4 GHz for a 64QAM OFDM signal. The overall receiver NF is 5.5/4.5 dB at 5/2.4 GHz.

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用于IEEE 802.11a/b/g WLAN的单片双带三模CMOS收发器

2.4/5 GHz收发器采用0.25 /spl mu/m CMOS技术实现IEEE 802.11a/g/b WLAN系统的RF和模拟前端。对于64QAM OFDM信号，该IC在5 GHz/2.4 GHz频率下传输9dbm / 8dbm evm标准输出功率。在5/2.4 GHz时，接收器的整体NF为5.5/4.5 dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

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