A discrete-time Bluetooth receiver in a 0.13/spl mu/m digital CMOS process

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519) Pub Date : 2004-09-13 DOI:10.1109/ISSCC.2004.1332697

Khurram Muhammad, D. Leipold, Bogdan Staszewski, Y. Ho, C. Hung, K. Maggio, C. Fernando, T. Jung, J. Wallberg, Jinseok Koh, S. John, I. Deng, O. Moreira, R. Staszewski, Ran Katz, O. Friedman

引用次数: 118

Abstract

A discrete-time receiver architecture for a wireless application is presented. Analog signal processing concepts are used to directly sample the RF input at Nyquist rate. Maximum receiver sensitivity is -83dBm and the chip consumes a total of 41mA from a 1.575V internally regulated supply. The receiver is implemented in a 0.13/spl mu/m digital CMOS process.

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一个0.13/spl mu/m数字CMOS工艺的离散时间蓝牙接收器

提出了一种用于无线应用的离散时间接收机结构。模拟信号处理的概念被用于以奈奎斯特速率直接采样射频输入。接收器的最大灵敏度为-83dBm，芯片从1.575V内部稳压电源中总共消耗41mA。接收机采用0.13/spl mu/m的数字CMOS工艺实现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

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