2006 64th Device Research Conference最新文献

{"title":"How does phonon generation influence AlGaN/GaN HFETs?- Transient and steady state studies","authors":"Yuh‐Renn Wu, Jasprit Singh","doi":"10.1109/DRC.2006.305140","DOIUrl":"https://doi.org/10.1109/DRC.2006.305140","url":null,"abstract":"AlGaN/GaN HFETs are high power device where power dissipation reaching more than 20 W/mm is not uncommon. What is the role of self-heating (equilibrium and non-equilibrium) and how does it influence device characterization and device performance? Traditionally the self-heating effect is assumed to be removed by using very short pulse current measurement and the fitting of hot phonon life time is then calculated based on this assumption[l], [2]. In order to check this assumption, we have developed two dimensional(2D) time dependent thermal conduction equation coupled with our 2D Poisson and driftdiffusion equation solver to study the temperature evolution in time domain for the nitride HFET. The time period between Ins-200ns and steady state temperature variation have been studied. The study shows self-heating effect may not be easily removed even with very short pulse length( 3ns). Our result explains part of the reason why low velocity still observed in the velocity-electrical field(v-E) measurement with very short pulse. The relation of current, power and temperature with time evolution will be addressed in this paper. To study the time dependent self-heating effect, we need to include the two-dimensional(2D) time dependent thermal conduction equation into our theoretical model. The thermal conduction equation is coupled into our developed 2D finite element (FEM) Poisson and continuity equation[3] to solve the current and potential self-iteratively at each time step. Figure l(a) shows typical two terminals device used for v-E measurement. The channel length is 1.6 ,um. The GaN buffer layer is 3,um and SiC substrate is assumed to be 100,um in this simulation. The mobility model is calculated from the Monte Carlo program[4] with different temperature as shown in Fig. l(b). This mobility model is then used to calculate the current with different temperature in the channel. The materials parameters used for thermal conduction equations are listed in Table I. Figure 2 shows the simulated temperature distribution in the device for two different time steps. The GaN buffer layer thickness is 3,um. As shown in the figure, at t = 10 ns, the heat generated in the channel has not have a chance to propagate to the GaN/SiC interface. This suggests that for the short pulse period, the substrate does not play any role to assist the removal of heat. Figure 3 shows the relationships of power density and temperature increase with time. The calculation shows the heating time constants are around a few nano second ranges. The average channel temperature still increases around 20K to 70K even at 2ns pulse for different power density. The thermal resistance obtained from 2D simulation is around 8.6 K mm/W, which is suitable for wide channel width cases because it does not consider the heat dissipation parallel to the channel width. Figure 4 shows the current density and temperature versus time for different VDSS. When the drain voltage increases, We observed a rapid ","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131056030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"InMnAs/InAs Heterojunctions for High-Field Magnetic Sensors","authors":"S. May, B. Wessels","doi":"10.1109/DRC.2006.305146","DOIUrl":"https://doi.org/10.1109/DRC.2006.305146","url":null,"abstract":"The devices are fabricated by epitaxially depositing InMnAs films (t 500 nm) on nInAs substrates via metal-organic vapor phase epitaxy (MOVPE). Mn is an acceptor in InAs, making the InMnAs films p-type. Mesa diodes (d = 250 pm) are patterned using conventional photolithography and wet etching; the device schematic is shown in Fig. 1. Rectifying behavior is observed. We have previously reported on the junction transport mechanisms and low-field (H < 0.5 T) magnetoresistance in InMnAs/InAs diodes [1]. It was found that a large magnetoresistance occurs when the forward-bias junction transport is dominated by high injection diffusion. In the present study, we have measured the magnetoresistance in magnetic fields up to 9 T, at temperatures ranging from 25 to 295 K.","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114635341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Monolithically Integrable Semiconductor Waveguide Optical Isolators using III-V Semiconductor / Ferromagnet Hybrid Structures","authors":"H. Shimizu, T. Amemiya, M. Tanaka, Y. Nakano","doi":"10.1109/DRC.2006.305072","DOIUrl":"https://doi.org/10.1109/DRC.2006.305072","url":null,"abstract":"Synthesis of III-V Semiconductor / Ferromagnetic metal or semiconductor hybrid structures is one of the hot topics in \"semiconductor spintronics\". Semiconductor waveguide optical isolators are ones of the most promising applications of Ill-V semiconductor / ferromagnet hybrid systems, which combine optical nonreciprocal property by ferromagnetic metals and light emission / amplification characteristics by Ill-V optoelectronics. Although free space optical isolators using ferrimagnetic garnets are commercially available with high performance and low price, they cannot be monolithically integrated with semiconductor laser diodes due to their incompatibility in material and structure with Ill-V optoelectronic devices. To realize monolithically integrable optical isolators, we have proposed semiconductor waveguide optical isolators based on the nonreciprocal loss shift. The semiconductor waveguide optical isolators based on the nonreciprocal loss shift are composed of semiconductor optical amplifier (SOA) waveguides and ferromagnetic metals. The ferromagnetic metal provides the nonreciprocal loss and the SOA compensates the forward propagation loss from the ferromagnetic metal as schematically shown in Fig. 1 [1]. Because the principle of this novel waveguide optical isolator is completely different from that of conventional free space optical isolators based on Faraday rotation, polarizers are not necessary. This is a great advantage over conventional free space optical isolators, and allows monolithic integration with edge emitting semiconductor lasers. We experimentally demonstrated TE mode semiconductor active waveguide optical isolators with ferromagnetic metal Fe at A= 1550nm. To achieve TE mode nonreciprocal loss shift, the magnetization vector of the ferromagnetic metal Fe is aligned parallel to the magnetic field vectorH of the TE mode light, perpendicular to both the waveguide and the substrate [2]. Therefore, we deposited Fe thin films on one of the InGaAsP SOA waveguide sidewalls by an electron-beam evaporator with substrates tilted, as shown in a cross-sectional image of Fig. 2. Fig. 3 shows the nonreciprocal propagation characteristics of the fabricated device of 0.7mm long with cleaved facets under a fixed permanent magnetic field 0.1 T. Here, the bias current of the SOA is 1OOmA. The devices were kept at 10°C. The single mode tunable laser diode light was of wavelength 15301560nm, intensity 5dBm, and coupled in and out of the device through lensed optical fibers. In the TE mode, the propagation light intensity was altered by a difference of 14.7dB/mm between the forward and the backward traveling light. However, the intensity change was very small (1dB) for TM mode. Because this device operates TE mode, this polarization dependence is a clear evidence of the nonreciprocal loss shift shown in Fig. 1. Fig. 4 shows the wavelength dependence of the TE mode propagation intensity and isolation ratio at a 1OOmA bias. Greater than 1 0dB/mm no","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"280 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123719305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"3-D Electrostatic Modeling and Impact of High-κ Control Oxide in Metal Nanocrystal Memory","authors":"T. Hou, Chungho Lee, V. Narayanan, U. Ganguly, E. Kan","doi":"10.1109/DRC.2006.305178","DOIUrl":"https://doi.org/10.1109/DRC.2006.305178","url":null,"abstract":"Although theoretical models of nanocrystal (NC) memories have been investigated by several groups [13], only 1-D electrostatic models were employed, despite the very nature of the 3-D spherical NCs and their 2-D arrayed distribution. In this paper, we establish a physical model based on the 3-D electrostatics for NC memory performance. We demonstrate, by replacing SiO2 with HfO2 as the control oxide in aggressively scaled memories, the continuous control oxide scaling is possible with improved program/erase (P/E) efficiency and retention time owing to the unique 3-D electrostatic effects. The results confirm 3-D electrostatics instead of 1-D should be considered in NC memory modeling. Numerical solution of the 3-D electrostatics in the NC memories is developed to calculate the electrostatic potential, the single-electron charging energy EC, and the 3-D channel-control factor R3D [2, 3], which can not be quantitatively addressed in the previous 1-D models. R3D, less than 1 in general, is a correction factor to the classic flatband voltage shift (AVFB) model in the continuous floating-gate devices due to the partial coverage of NCs over the Si channel. The charges in NCs can only perturb the channel potential in a smaller effective coverage area less than the NC unit cell area, but significantly larger than the NC cross-section area due to 3-D fringing field. Meanwhile, the tunneling calculation at the least-action path is carried out by modified 1-D Wentzel-Kramers-Brillouin (WKB) approximation taking inversion layer quantization into account [4]. The P/E and retention characteristics are determined from time-dependent, self-consistent tunneling current because the potential has to be updated due to the Coulomb blockade effect whenever electrons are in or out of the NCs. Figure 1 illustrates the schematic of the metal NC cell. Good agreements have been shown between the simulated and experimental programming transients of an Au metal NC memory in Fig. 2. Details of the device fabrication were similar to those in [5]. The simulation parameters, initial flatband voltage VFB= 0 V, tunneling oxide thickness Tt,,l = 2 nm, control oxide thickness TC,,l = 27 nm, NC diameter D = 5 nm, NC spacing S = 13 nm, NC density N= 4x 10 cm2 , NC work function 5.1 eV and NC tunneling capture cross-section ACC = 5.3x10-14 cm2 per NC, are fairly close to estimation from various types of physical characterization in the given sample, which validates the accuracy of our formalism. The scaling of the control oxide effective oxide thickness (EOT) is necessary to reduce the memory cell size. Moreover, it increases the coupling ratio, which improves P/E efficiency in the conventional continuous floating gate devices. In the NC memories, however, due to the Coulomb blockade effect, the maximum number of stored charges is self-saturated depending on EC and the bias condition. High coupling ratio by scaling TC,,l may allow more charges stored in NCs at self saturation, but does","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116794578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Developing Bipolar Transistors for Sub-mm-Wave Amplifiers and Next-Generation (300 GHz) Digital Circuits","authors":"M. Rodwell, Z. Griffith, N. Parthasarathy, E. Lind, C. Sheldon, S. Bank, U. Singisetti, M. Urteaga, K. Shinohara, R. Pierson, P. Rowell","doi":"10.1109/DRC.2006.305093","DOIUrl":"https://doi.org/10.1109/DRC.2006.305093","url":null,"abstract":"Here we consider the prospects for continued improvement in InP HBTs, specifically the challenges faced in a further doubling of transistor and IC bandwidth. Our objective is an IC technology supporting 300 GHz digital clock rates, -600 GHz reactively-tuned amplifiers, and balanced cutoff frequencies in the 700-1000 GHz range. Such ICs would permit monolithic transceivers for 300 GHz and 600 GHz imaging systems, -250 GHz high-rate communications radios, chip sets for 300 Gb/s optical data transmission, and very high-resolution microwave mixed-signal ICs.","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115313406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Improved MOSFET characteristics by Incorporating Laminated Dysprosium (Dy2O3) Dielectric into HfO2 Gate Stack","authors":"Tackhwi Lee, S. Rhee, C. Kang, F. Zhu, Manhong Zhang, H. Kim, C. Choi, I. Ok, S. Koveshnikov, Hokyung Park, Jack C. Lee","doi":"10.1109/DRC.2006.305122","DOIUrl":"https://doi.org/10.1109/DRC.2006.305122","url":null,"abstract":"New structural approach of Dy2O3 incorporated HfO2 multi-metal oxide n-MOSFETs and their electrical characterization are investigated for the first time. Top Dy2O3 laminated HfO2 bi-layer structure shows the thinnest EOT with reduced leakage current compared to control HfO2. Improved electrical characteristics such as lower VT, higher drive current and channel electron mobility are demonstrated. In addition, better VT instabilities, reduced dielectric charge trapping, and less Ta penetration from TaN metal gate electrode are obtained in Dy2O3/HfO2 structure. Finally, reduced phonon scattering is found to be the plausible mechanism for higher channel mobility.","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122418907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High Performance 1.45 μm InAs Quantum Dot Lasers on GaAs","authors":"Z. Mi, J. Yang, P. Bhattacharya","doi":"10.1109/DRC.2006.305101","DOIUrl":"https://doi.org/10.1109/DRC.2006.305101","url":null,"abstract":"The conventional light source for long-haul optical communications has been InGaAsP/InP double heterostructure or multi-quantum well lasers, but these devices characteristically have high Ith, small To (40 50 K), small T1, and large values of chirp (> 2 A) and a-factor (2 5). Two different material systems are being investigated for long wavelength lasers, both based on GaAs substrates. In the first, the active region consists of GaInNAsSb quantum wells and the lasers (2 1.45 1.6 ptm) are usually characterized by high Jth (> 1000 A/cm2).' The modulation characteristics are hitherto unknown. The other alternative is the use of In(Ga)As/GaAs quantum dots (QDs) as the gain material. While extraordinary performance has been reported for 1.3 ptm QD lasers (low Ith, To =o, a e 0, chirp < 1 A, f3dB = 12 GHz),2' the development of 1.55 ptm QD lasers, wherein metamorphic QD heterosructures have to be used due to the large strain, has not been so optimistic. The devices reported (2 1.45 ptm) have Jth> 800 A/cm2, poor luminescence of the QDs with linewidth > 70 meV and no data is available on the dynamic characteristics.4 By detailed investigation of the growth kinetics of the metamorphic heterostructures, we have realized InAs QDs on GaAs that are comparable in PL intensity and linewidth to state-of-the-art 1.1 and 1.3 ptm InAs QDs. 1.45 ptm lasers made with these heterostructures exhibit, for the first time, ultra low Jth (70 A/cm2), To oo,f3dB= 5 GHz, chirp < 0.3 A, a 1.0, and present a practical alternative to the InGaAsP/InP technology. The Ino.15Gao.85As/Ino. 5Al0.35Gao.5oAs separate confinement heterostructure lasers with InAs QD active region, as illustrated in Fig. 1(a), were grown on (001) GaAs substrates by MBE. The active region consists of four or eight QD layers, which are either undoped or modulation doped p-type using Be (20 holes per dot). A 0.6 ptm Ino 15Gao 85As buffer layer was grown at a relatively low temperature (390 °C), which can accommodate most of the misfit dislocations. Multiple steps of thermal cycle anneal (700 °C) were then utilized to further reduce defect densities and suppress their propagation into the active region. A thin (15 A) AlAs layer was first grown as a protective layer to avoid any potential indium desorption during the anneal. The surface of the laser sample grown under optimized conditions is free of any micro-structural roughness or stacking faults. Each InAs QD layer consists of 2.9 ML InAs, capped by an additional 50 A In0.33Ga0.67As layer. To smooth the growth front and avoid phase separation, thin (20 A) GaAs layers were grown before and after each InAs QD layer. After the growth of each QD layer, an in situ anneal at 600 °C is performed, which can reduce any surface undulations, and therefore allow the growth of multiple layers of defect-free QDs. The room temperature PL spectra of InAs QDs grown at various temperatures are shown in Fig. l(b). With optimum growth conditions, the QDs exhibit intense PL em","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"698 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132764109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"High-Breakdown Voltage AlGaN/GaN HEMTs using trench gates","authors":"Y. Dora, A. Chakraborty, L. McCarthy, S. Keller, S. Denbaars, U. Mishra","doi":"10.1109/DRC.2006.305166","DOIUrl":"https://doi.org/10.1109/DRC.2006.305166","url":null,"abstract":"","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"535 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132341890","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Increase in current density at 25-nm-wide emitter for InP hot-electron transistors without base layer","authors":"Y. Miyamoto, I. Kashima, A. Suwa, K. Furuya","doi":"10.1109/DRC.2006.305057","DOIUrl":"https://doi.org/10.1109/DRC.2006.305057","url":null,"abstract":"A narrow emitter is effective in reducing power consumption in electron devices. Moreover, it can provide high-speed operation. As one of such devices, we proposed a hot-electron transistor without a base layer [1]. In this device, hot electrons generated by a heterostructure launcher pass through only an intrinsic semiconductor, resulting in the propagation of electrons without scattering. Because a forward-biased gate on the intrinsic propagation region modulates the potential of the launcher, a narrow emitter is required to create a uniform potential. As described in our former report [2], we fabricated a 25-nm-wide emitter and the transistor action was observed. However, the observed current density for current amplification was around 10 A/cm2, although resonant tunneling diode (RTD) using the same epitaxial structure shows a 1 kA/cm2 peak current density. To exhibit high-speed performance without scattering, high current density in a narrow emitter is essential.","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133379828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fabrication of Self-Assembled Ni Nanocrystal Flash Memories Using a Polymeric Template","authors":"D. Shahrjerdi, J. Sarkar, X. Gao, D. Kelly, S. Banerjee","doi":"10.1109/DRC.2006.305177","DOIUrl":"https://doi.org/10.1109/DRC.2006.305177","url":null,"abstract":"Nanocrystal floating gate (FG) flash memories have attracted a lot of interest due to their potential advantages over conventional flash devices, including scalability and lower operating voltages. In addition, discrete electrically-isolated particles appear to significantly suppress charge loss through lateral paths, which, in turn, gives rise to better retention properties [1]. From a materials standpoint, metal nanocrystals are of interest due to their higher density-of-states and potentially larger work function as compared to Si nanocrystals, which provides a larger retention barrier for stored electrons [2]. The general methods of metal nanocrystal formation include aerosol and self-assembly [3]. However, employing these methods leads to a large fluctuation in both the size and the density of the nanocrystals, which hinders manufacturability and scalability of these devices. In this work, we describe a polymeric self-assembly approach in order to achieve tight control over the size and density of metal nanocrystals using the PS-PMMA diblock copolymer as a nanotemplate. A tri-layer pattern-transfer approach [4] was used to facilitate a metal lift-off process because of the low aspect ratio of the copolymer pattern. The tri-layer structure consists of a PS-b-PMMA copolymer top layer, an SiO2 middle layer, and a polyimide bottom layer. Diblock copolymers are composed of two distinct blocks with high interaction energy. An annealing step tends to promote microphase separation into nanometer-scale polymer domains in order to minimize the total free energy of the system. As a result, a highly uniform, hexagonally-close-packed array ofPMMA cylinders is produced into a PS matrix with size and density specifications that depend on the molecular weight of the copolymer [5]. This polymer-based self-assembly can be easily engineered in terms of the dimension and density of the resulting nanocrystals using copolymers with different molecular weights. In this work, the PMMA removal in glacial acetic acid leaves behind a porous PS template of 20nm-diameter pores with a center-to-center spacing of 40nm. The device fabrication process started with the thermal growth of a 4-nm SiO2 tunnel oxide on a conventional Si wafer. Next, a 60-nm-thick polyimide film was spin-coated onto the substrates, followed by a 15-nm PECVD SiO2. Polyimide was chosen as the bottom layer because of its high glass transition temperature of 309°C, which is higher than the subsequent processing temperatures. The key steps for Ni dot formation using the tri-layer pattern-transfer method are (Fig.1): (a) creating the porous PS template; (b) etching PECVD oxide through the polymer template using CHF3; (c) transferring the oxide patterns into the polyimide film using 02 RIE; (d) nickel deposition through e-beam evaporation; (e) polyimide removal in an organic solvent leaving behind a uniform array of Ni dots. Fig. 2(c) shows the SEM image of the Ni dots with a density of -6 10x ° /cm2. Fa","PeriodicalId":259981,"journal":{"name":"2006 64th Device Research Conference","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133386421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}