金属纳米晶记忆体中高κ控制氧化物的三维静电建模及影响

T. Hou, Chungho Lee, V. Narayanan, U. Ganguly, E. Kan
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Numerical solution of the 3-D electrostatics in the NC memories is developed to calculate the electrostatic potential, the single-electron charging energy EC, and the 3-D channel-control factor R3D [2, 3], which can not be quantitatively addressed in the previous 1-D models. R3D, less than 1 in general, is a correction factor to the classic flatband voltage shift (AVFB) model in the continuous floating-gate devices due to the partial coverage of NCs over the Si channel. The charges in NCs can only perturb the channel potential in a smaller effective coverage area less than the NC unit cell area, but significantly larger than the NC cross-section area due to 3-D fringing field. Meanwhile, the tunneling calculation at the least-action path is carried out by modified 1-D Wentzel-Kramers-Brillouin (WKB) approximation taking inversion layer quantization into account [4]. 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The scaling of the control oxide effective oxide thickness (EOT) is necessary to reduce the memory cell size. Moreover, it increases the coupling ratio, which improves P/E efficiency in the conventional continuous floating gate devices. In the NC memories, however, due to the Coulomb blockade effect, the maximum number of stored charges is self-saturated depending on EC and the bias condition. High coupling ratio by scaling TC,,l may allow more charges stored in NCs at self saturation, but does not guarantee larger AVFB (see Fig. 3), which is influenced by the combined effect of charge density, Tc,,I, and R3D. Even more importantly, if EC does not scale much with Tc,,I, more charges stored in NCs may adversely affect retention characteristics Therefore, the trade-off between Tc,,l and NC memory characteristics is a fundamental problem to consider in the NC memory cell design. High-K dielectrics as the control oxide can provide an effective solution. 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引用次数: 0

摘要

虽然纳米晶体(NC)存储器的理论模型已经被几个小组研究过[13],但尽管三维球形NC的本质及其二维排列分布,但只采用了一维静电模型。本文建立了基于三维静电的数控记忆性能物理模型。我们证明,通过用HfO2代替SiO2作为主动缩放存储器中的控制氧化物,由于独特的3-D静电效应,连续控制氧化物缩放可以提高程序/擦除(P/E)效率和保留时间。结果表明,在数控内存建模中应考虑三维静电而不是一维静电。建立了数控存储器中三维静电的数值解,以计算静电势、单电子充电能量EC和三维通道控制因子R3D[2,3],这些在以前的一维模型中无法定量解决。R3D通常小于1,是连续浮栅器件中经典平带电压移位(AVFB)模型的校正因子,这是由于NCs在Si通道上的部分覆盖。由于三维边缘场的作用,纳米芯片中的电荷只能在一个较小的有效覆盖面积内干扰通道电位,该面积小于纳米芯片的单元格面积,但明显大于纳米芯片的横截面面积。同时,最小作用路径下的隧穿计算采用考虑反转层量化的改进一维WKB近似进行[4]。P/E和保持特性是由时间相关的、自一致的隧道电流决定的,因为当电子进入或离开NCs时,由于库仑封锁效应,电位必须更新。图1说明了金属数控单元的原理图。图2显示了一个金金属数控存储器的模拟瞬态和实验编程瞬态之间的良好一致性。器件制作细节与文献[5]相似。仿真参数,初始flatband电压VFB = 0 V,穿隧氧化层厚度Tt, l = 2海里,控制氧化厚度TC、l = 27海里,数控直径D = 5 nm,数控间距S = 13海里,数控密度N = 4 x 10平方厘米,数控功函数5.1 eV和数控隧道捕获截面ACC = 5.3 x10-14 cm2 /数控,相当接近估计从各种类型的物理特性在给定的样本,验证我们的形式主义的准确性。控制氧化物有效氧化物厚度(EOT)的缩放是减小存储单元尺寸所必需的。此外,它还增加了耦合比,从而提高了传统连续浮栅器件的P/E效率。然而,在NC存储器中,由于库仑阻塞效应,最大存储电荷数是自饱和的,这取决于EC和偏置条件。通过缩放TC,, 1来提高耦合比,可以在nc自饱和时存储更多的电荷,但不能保证更大的AVFB(见图3),这受电荷密度、TC,, 1和R3D的综合影响。更重要的是,如果EC与Tc的比例不太大,那么存储在NC中的更多电荷可能会对保留特性产生不利影响。因此,Tc、、1和NC存储特性之间的权衡是NC存储单元设计中需要考虑的基本问题。作为控制氧化物的高钾电介质可以提供有效的解决方案。高k介电介质首次被引入浮栅器件以抑制聚间泄漏[6]。然而,高k控制氧化物在NC存储器中的真正意义在于其独特的三维静电特性。如图4所示,EC和R3D对控制氧化物EOT相对不敏感,但介电常数的作用较强。为了更好地理解这一点,图5绘制了NC单元格中的三维电位轮廓的横截面。由于HfO2的介电常数较高,通过HfO2到Si通道的条纹场明显更强。这大大增加了基底- nc耦合电容和nc中存储的电荷影响下的有效通道覆盖面积。因此,较低的Ec和较大的R3D与HfO2预期。在NC中存储的电荷数量相同的情况下,较大的R3D通过允许较大的AVFB而有利于编程效率,而较低的Ec通过保持NC费米能级与Si导带之间较大的频带偏移来改善保持特性。这大大提高了存储器性能,如图6所示,这是由我们的三维静电模型得到的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
3-D Electrostatic Modeling and Impact of High-κ Control Oxide in Metal Nanocrystal Memory
Although theoretical models of nanocrystal (NC) memories have been investigated by several groups [13], only 1-D electrostatic models were employed, despite the very nature of the 3-D spherical NCs and their 2-D arrayed distribution. In this paper, we establish a physical model based on the 3-D electrostatics for NC memory performance. We demonstrate, by replacing SiO2 with HfO2 as the control oxide in aggressively scaled memories, the continuous control oxide scaling is possible with improved program/erase (P/E) efficiency and retention time owing to the unique 3-D electrostatic effects. The results confirm 3-D electrostatics instead of 1-D should be considered in NC memory modeling. Numerical solution of the 3-D electrostatics in the NC memories is developed to calculate the electrostatic potential, the single-electron charging energy EC, and the 3-D channel-control factor R3D [2, 3], which can not be quantitatively addressed in the previous 1-D models. R3D, less than 1 in general, is a correction factor to the classic flatband voltage shift (AVFB) model in the continuous floating-gate devices due to the partial coverage of NCs over the Si channel. The charges in NCs can only perturb the channel potential in a smaller effective coverage area less than the NC unit cell area, but significantly larger than the NC cross-section area due to 3-D fringing field. Meanwhile, the tunneling calculation at the least-action path is carried out by modified 1-D Wentzel-Kramers-Brillouin (WKB) approximation taking inversion layer quantization into account [4]. The P/E and retention characteristics are determined from time-dependent, self-consistent tunneling current because the potential has to be updated due to the Coulomb blockade effect whenever electrons are in or out of the NCs. Figure 1 illustrates the schematic of the metal NC cell. Good agreements have been shown between the simulated and experimental programming transients of an Au metal NC memory in Fig. 2. Details of the device fabrication were similar to those in [5]. The simulation parameters, initial flatband voltage VFB= 0 V, tunneling oxide thickness Tt,,l = 2 nm, control oxide thickness TC,,l = 27 nm, NC diameter D = 5 nm, NC spacing S = 13 nm, NC density N= 4x 10 cm2 , NC work function 5.1 eV and NC tunneling capture cross-section ACC = 5.3x10-14 cm2 per NC, are fairly close to estimation from various types of physical characterization in the given sample, which validates the accuracy of our formalism. The scaling of the control oxide effective oxide thickness (EOT) is necessary to reduce the memory cell size. Moreover, it increases the coupling ratio, which improves P/E efficiency in the conventional continuous floating gate devices. In the NC memories, however, due to the Coulomb blockade effect, the maximum number of stored charges is self-saturated depending on EC and the bias condition. High coupling ratio by scaling TC,,l may allow more charges stored in NCs at self saturation, but does not guarantee larger AVFB (see Fig. 3), which is influenced by the combined effect of charge density, Tc,,I, and R3D. Even more importantly, if EC does not scale much with Tc,,I, more charges stored in NCs may adversely affect retention characteristics Therefore, the trade-off between Tc,,l and NC memory characteristics is a fundamental problem to consider in the NC memory cell design. High-K dielectrics as the control oxide can provide an effective solution. High-K dielectrics were first introduced to the floating gate devices to suppress the inter-poly leakage [6]. However, the true significance of the high-K control oxide in NC memories lies in the unique 3-D electrostatic nature. As shown in Fig. 4, EC and R3D are relatively insensitive to the control oxide EOT, but strong functions of the dielectric constant. To better understand this, the cross-sections of the 3-D potential contours in the NC unit cell are plotted in Fig. 5. It is obvious that the fringing field through HfO2 to the Si channel is much stronger due to the higher dielectric constant of HfO2. This substantially increases the substrate-NC coupling capacitance and the effective channel coverage area under the influence of the charges stored in NCs. Thus, lower Ec and larger R3D with HfO2 are expected. With the same number of charges stored in NCs, larger R3D benefits the programming efficiency by allowing larger AVFB while lower Ec improves the retention characteristics by maintaining larger band offset between the NC Fermilevel and the Si conduction band. These lead to much improved memory performance in Fig. 6 obtained from our 3-D electrostatic model.
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