{"title":"Automatic parameter control system for semiconductor structures manufacturing","authors":"O. Starostenko, J.G. Vazquez Luna, V. Khoma","doi":"10.1109/MMICA.1999.833598","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833598","url":null,"abstract":"This paper describes analysis of measurement equipment design concepts and some advances in our research regarding the construction of computer based facilities for electrical and non-electrical complex parameters measurements of semiconductor structures. CV- and GV-characteristics system has been designed and used for automatic parameter control of semiconductors production particularly for technological process control of the charge-coupled CCD device manufacturing. The proposed measuring system has been analyzed to estimate performance of semiconductor characteristics acquisition and processing. That information is used as a feedback action to improve a technological process of the CCD structure manufacturing.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130705723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A dynamic content addressable memory using a 4-transistor cell","authors":"J. Delgado-Frías, A. Yu, J. Nyathi","doi":"10.1109/MMICA.1999.833611","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833611","url":null,"abstract":"A novel ternary dynamic content addressable memory cell with coupled match lines is presented here. The dynamic CAM cell contains only four n-type transistors. This cell is capable of storing and matching three states, hence the term ternary; these states are: zero (0), one (1) and don't care (X). Circuit simulations show that our dynamic CAM cell performs all the basic operations (read, write and match) at a good speed. In order to use the proposed cell in a CAM array, we developed a cut-off scheme to deal with coupling.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123033250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. De Jesus-Ventura, C. A. de la Cruz-Blas, M. Juarez-Manny, A. Montiel-Marinez, R. Rodriguez-Torres, A. Sarmiento-Reyes
{"title":"A set of MAPLE libraries for computer-assisted circuit analysis","authors":"R. De Jesus-Ventura, C. A. de la Cruz-Blas, M. Juarez-Manny, A. Montiel-Marinez, R. Rodriguez-Torres, A. Sarmiento-Reyes","doi":"10.1109/MMICA.1999.833592","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833592","url":null,"abstract":"MAPLE is a computer algebra system (GAS) that has the qualifications to be a tool of selection for handling many computational issues within electrical engineering. In this paper, we show how MAPLE can be used as a verification tool for electric circuits. A set of MAPLE packages has been developed for achieving several tasks: topological analysis of the graphs emanating from electric circuits, complete DC analysis of nonlinear resistive circuits including a topology-oriented analysis for assessing the uniqueness of the DC operating point and both, Newton-Raphson schema and various homotopy methods, and AC analysis of linear(ised) circuits.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125000897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A multirate approach to design of fractional delay filters","authors":"R.M. Aguilar Ponce, G. Jovanovic-Dolecek","doi":"10.1109/MMICA.1999.833619","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833619","url":null,"abstract":"This paper presents a new approach to the design of fractional delay discrete-time filters based on a multirate approach. We considered the case where it is necessary to generate a delay which is a ratio of very high integers. In order to obtain an efficient filter we propose a modification of the general polyphase structure for fractional delay.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124479788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A fully-programmable temperature-compensated analogue circuit for Gaussian functions","authors":"M. Melendez-Rodriguez, J. Silva-Martínez","doi":"10.1109/MMICA.1999.833624","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833624","url":null,"abstract":"A compact and fully programmable Gaussian function circuit with temperature compensation is introduced. The programmability of the Gaussian circuit generator is carried out by using current sources. HSpice simulations for the proposed structure have shown deviations from the ideal Gaussian function below to 3%. Breadboard results for the Gaussian circuit generator, in good agreement with the theoretical ones, are reported.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115767646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design considerations for biomedical signal interfaces","authors":"S. Solis-Bustos, J. Silva-Martínez","doi":"10.1109/MMICA.1999.833631","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833631","url":null,"abstract":"In this paper, IC design considerations for preamplifiers and filters intended for analog preprocessing of biomedical signals are discussed. A revision of previously reported design techniques is carried out, and several design challenges are mentioned. Special attention is paid to implantable devices, and systems where small die area, very low power consumption and a minimal number of external components are a must.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122633568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Amendola, Y. Blanchard, A. Exertier, S. Spirkovitch, G. Lu, G. Alquié
{"title":"A CMOS, self-biased charge amplifier","authors":"G. Amendola, Y. Blanchard, A. Exertier, S. Spirkovitch, G. Lu, G. Alquié","doi":"10.1109/MMICA.1999.833580","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833580","url":null,"abstract":"In this article a charge amplifier dedicated to the signal processing of a capacitive silicon microphone is described. One feature of this amplifier is the implementation of a self-biased technique. It is a transconductance amplifier having a very high output resistance. The current consumption is quite low (20 /spl mu/A without the bias circuit) and the dimensions are 210 /spl mu/m by 170 /spl mu/m (including all capacitors). The amplifier has been designed and fabricated in 0.8 /spl mu/m CMOS technology. Both simulation and measurement results have shown the analog memorization of DC bias voltage.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117167037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design methodology of an audio sensor system using switched-current cells","authors":"J. Santana, F. Sandoval-Ibarra, I. Grout","doi":"10.1109/MMICA.1999.833581","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833581","url":null,"abstract":"This paper describes the design and simulation of a current-mode filter that is to be part of an application specific integrated circuit (ASIC) for signal conditioning the input from an audio sensor. Such filters may be used in electronic systems where sensors are used to measure physical parameters in order to provide information to the human user. The filter design described in this paper is based on switched-current (SI) design techniques (in particular a biquadratic filter is implemented for this design). With the SI design technique, variations in current values may be achieved with relatively small variations in nodal voltage. In addition, the power supply requirements and fabrication cost will be two considerations for the final choice of implementation method. In this study, current-mode design techniques are used for its suitability in low voltage operation and the ability to create analogue signal conditioning circuitry using a standard digital CMOS fabrication process. This ability to utilize a digital fabrication process may result in a lower cost solution than using an analogue fabrication process.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121810673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Trapezoidal association of transistors for mixed analog-digital circuits design on SOT array","authors":"J. Choi, S. Bampi","doi":"10.1109/MMICA.1999.833597","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833597","url":null,"abstract":"This paper presents advantages of CMOS trapezoidal association of transistors (TAT) aiming at semi-custom mixed analog/digital circuits design on Sea-Of-Transistors (SOT) array. Several types and structures of transistors were implemented to allow better comparison with the association of transistors of same size. The SOT unit cells are on fixed size array and experimental results are shown for a 1.0 /spl mu/m digital technology.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128943439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An associative self-compacting buffer for communication switches","authors":"J. Delgado-Frías, A. Jafri","doi":"10.1109/MMICA.1999.833609","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833609","url":null,"abstract":"This paper describes a novel VLSI CMOS implementation of a self-compacting buffer (SCB) for the dynamically allocated multi-queue (DAMQ) switch architecture. The SCB scheme dynamically allocates data regions within the input buffer for each output channel. The proposed scheme provides a high-performance solution to buffered communication switches that are required in interconnection networks. This performance comes from the DAMQ approach as well as the Associative Channel Pointer implementation and novel circuitry. The major components of the SCB are described in detail in this paper. The system has the capability of performing a read, a write, or a simultaneous read/write operation per cycle.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"92 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131770820","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}