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Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)最新文献

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ASIC for a system for clinical objective evaluation of induced pharmacological neuromuscular blockage 一种用于诱导药理神经肌肉阻滞临床客观评价系统的ASIC
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1999-07-26 DOI: 10.1109/MMICA.1999.833632
J. Remolina, H. Zepeda, J. Miranda, J. Rosas, H. Nohe
{"title":"ASIC for a system for clinical objective evaluation of induced pharmacological neuromuscular blockage","authors":"J. Remolina, H. Zepeda, J. Miranda, J. Rosas, H. Nohe","doi":"10.1109/MMICA.1999.833632","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833632","url":null,"abstract":"Except for the output transistor, and the force transducer, the Application Special Integrated Circuit (ASIC) described herein contains all the electronic components of a system for the objective clinical evaluation of the neuromuscular blockage produced in patients, for medical purposes, by the intravenous injection of muscle relaxing drugs. The system contains three sections: an electric stimulator for motor nerves; a section that receives the signals coming from a force transducer attached to the corresponding muscle, evaluates the relative strength of the ensuing muscular contractions and stores the results in four registers, and a section that drives a liquid crystal display.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129729176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A new method for the characterization of the longitudinal and transverse strain sensitivities of conductive thin films for their use in microsensors 一种用于微传感器的导电薄膜纵向和横向应变灵敏度表征的新方法
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1999-07-26 DOI: 10.1109/MMICA.1999.833599
H. Estrada, J.F. Estrada-Vazquez
{"title":"A new method for the characterization of the longitudinal and transverse strain sensitivities of conductive thin films for their use in microsensors","authors":"H. Estrada, J.F. Estrada-Vazquez","doi":"10.1109/MMICA.1999.833599","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833599","url":null,"abstract":"This work explores a new method for measuring the absolute (longitudinal and transverse) strain sensitivity of conductive strain thin-film gages deposited on silicon structures. Strain gages are integrated at key positions of the diaphragm submitted to constant pressures where points of zero radial strain and near-zero angular (circumferential) strain can be defined over the surface of a pressurized diaphragm. The strain sensitivities of gold and semimetal thin films are determined, in view of their inclusion as strain gages. An anomalous behavior of the semimetal films is highlighted for it allows us to fabricate strain gages of sensitivities much larger than metallic counterparts and approximately equal to those exhibited by semiconductor materials such as silicon. The patterning (by chemical etching) of the semi-metal films and electrical contacts is developed as part of the process for the fabrication of microelectronic circuits and micro-sensors.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"151 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116912316","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An approach to the implementation of digital control algorithms in mixed-mode ASIC designs 一种在混合模式ASIC设计中实现数字控制算法的方法
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1999-07-26 DOI: 10.1109/MMICA.1999.833608
I. Grout, S. Burge, A.J. Winsby
{"title":"An approach to the implementation of digital control algorithms in mixed-mode ASIC designs","authors":"I. Grout, S. Burge, A.J. Winsby","doi":"10.1109/MMICA.1999.833608","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833608","url":null,"abstract":"In the field of control systems, electronic circuits form the heart of many control algorithm implementation strategies. The standard approach in many applications utilises a digital control algorithm with, where necessary, external analogue and mixed-signal interfacing circuitry. With the growth of HDL modelling of digital ASIC circuits and systems prior to fixing the final ASIC structure, consideration is given to the use of the various design approaches taken to realise the final product. This paper describes an approach in which a digital control algorithm core may be created using VHDL with a design and analysis flow at both the ASIC and control systems level. The algorithm core of the ASIC is part of an overall mixed-mode (mixed-signal) design, which is part of an overall mixed-technology solution. Macro modeling of the overall control system that targets available modeling and simulation approaches complements the VHDL core.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129601723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Automatic symbolic evaluation of nonideal effects in SI circuit behavior SI电路行为中非理想效应的自动符号评价
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1999-07-26 DOI: 10.1109/MMICA.1999.833590
L.J. Mourao, M. Fino
{"title":"Automatic symbolic evaluation of nonideal effects in SI circuit behavior","authors":"L.J. Mourao, M. Fino","doi":"10.1109/MMICA.1999.833590","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833590","url":null,"abstract":"This paper presents a program for automatically generating symbolic signal flow graphs (SFGs) of switched current (SI) filtering structures considering the nonideal effect introduced by mismatching of transistors. Once the description of an SI filtering topology is given, by using a new version of symbSI the corresponding SFG is generated including transistor mismatch. As will be shown in the paper the effect in transistor mismatch is accounted for by the inclusion of correcting factors in the weights of the SFG branches, but the topology of the graph remains constant, which makes the adaptation of the program developed for ideal structures quite straightforward.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"327 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115457528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fault detection methodology for second order filters using compact test vectors transient analysis 基于紧凑测试向量的二阶滤波器故障检测方法
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1999-07-26 DOI: 10.1109/MMICA.1999.833585
J. Calvano, V. Alves, M. Lubaszewski
{"title":"Fault detection methodology for second order filters using compact test vectors transient analysis","authors":"J. Calvano, V. Alves, M. Lubaszewski","doi":"10.1109/MMICA.1999.833585","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833585","url":null,"abstract":"This work proposes a functional approach for fault modeling in 2/sup nd/ order filters and presents a new use for the transient analysis method for fault detection. The approach considers the filter as a 2/sup nd/ order dynamic system and the use of the peak time and the system overshoot as observed parameters. The input stimuli are compact test vectors which consist of a step, ramp or parabola. The obtained results show that 100% of soft faults can be detected.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116842213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Electronics implementation of a neuron model with parabolic burst response 具有抛物型突发响应的神经元模型的电子学实现
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1999-07-26 DOI: 10.1109/MMICA.1999.833614
J.L. Perez S., A. Herrera, M. Banuelos, S. Quintana, J. Castillo, W. Martinez, A. Padrón, A. Garces, R. Prieto
{"title":"Electronics implementation of a neuron model with parabolic burst response","authors":"J.L. Perez S., A. Herrera, M. Banuelos, S. Quintana, J. Castillo, W. Martinez, A. Padrón, A. Garces, R. Prieto","doi":"10.1109/MMICA.1999.833614","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833614","url":null,"abstract":"This work describes an electronic circuit of a neuron model that presents to the output a burst of the parabolic type. The authors detail the circuit, the analysis of its short-term memory effect and the corresponding delay of the axon. We present a neuron cascade to analyze a feedback circuit, in addition to a total interconnection circuit among the two neurons. Establishes the comparisons of the circuits with parabolic burst and the circuits that do not have burst to estimate the effects provoked by the types of response.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121933559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Electronic model of single commutation neuron 单个换向神经元的电子模型
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1900-01-01 DOI: 10.1109/MMICA.1999.833623
A. Padron G., J.L. Perez S., A. Herrera B., R. Prieto M.
{"title":"Electronic model of single commutation neuron","authors":"A. Padron G., J.L. Perez S., A. Herrera B., R. Prieto M.","doi":"10.1109/MMICA.1999.833623","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833623","url":null,"abstract":"In this work we present the design of an electronic model of a single commutation neuron and illustrate some of its dynamic behavior. This kind of electronic neuron shows changes in the activity of its potential when it is equal to threshold level constant. In particular, the neuron model developed presents commutation processes in its dynamical behavior. That is, the model is integrative as a leaky integrator below the threshold level and shoots when it reaches it; then the neuron's potential decays similar to an integrate and fire model. The electronic neuron can commute between, at least, two different kinds of oscillatory behavior. As a consequence of this, the neural response can be formed with different combinations of spikes and pulses.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117008249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Study of a sequence of neural oscillators 神经振荡器序列的研究
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1900-01-01 DOI: 10.1109/MMICA.1999.833633
R. Prieto M., A. Herrera B., J.L. Perez S., A. Padron G.
{"title":"Study of a sequence of neural oscillators","authors":"R. Prieto M., A. Herrera B., J.L. Perez S., A. Padron G.","doi":"10.1109/MMICA.1999.833633","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833633","url":null,"abstract":"Several computational processes in neural systems have been associated with periodic phenomena, such as mobile pattern recognition and composition of associative memories. Using neurons with a self-connection and a time delay in its response, we had built a two neuron circuit that presents a non trivial oscillatory behavior. We show the different responses that can be obtained from this kind of circuit; we show these responses cannot be obtained from a single neuron, even though it is stimulated with periodic inputs, as a consequence of the nonlinear characteristic of the oscillations produced by the first neuron. Finally, the characteristics of the response depend on the parameters of the two neurons, thus the effect of these parameters on the circuit response is revised.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115053882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Real-time integer convolution implemented using systolic arrays and a digit-serial architecture in complex programmable logic devices 在复杂的可编程逻辑器件中使用收缩阵列和数字串行结构实现实时整数卷积
Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1900-01-01 DOI: 10.1109/MMICA.1999.833620
G.F. Santillan Q., D. Iparraguirre C.
{"title":"Real-time integer convolution implemented using systolic arrays and a digit-serial architecture in complex programmable logic devices","authors":"G.F. Santillan Q., D. Iparraguirre C.","doi":"10.1109/MMICA.1999.833620","DOIUrl":"https://doi.org/10.1109/MMICA.1999.833620","url":null,"abstract":"In this work an FIR filter is designed, combining the systolic architecture with the digit-serial technique. Multipliers are designed with this technique and the accumulator exploits these characteristics avoiding the lack of real-time computing capability and data processing speed. The system can be used in realtime digital signal and image processing applications. The simulation results presented were obtained using the FLEX 10K20 device of Altera.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126416160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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