{"title":"Automatic symbolic evaluation of nonideal effects in SI circuit behavior","authors":"L.J. Mourao, M. Fino","doi":"10.1109/MMICA.1999.833590","DOIUrl":null,"url":null,"abstract":"This paper presents a program for automatically generating symbolic signal flow graphs (SFGs) of switched current (SI) filtering structures considering the nonideal effect introduced by mismatching of transistors. Once the description of an SI filtering topology is given, by using a new version of symbSI the corresponding SFG is generated including transistor mismatch. As will be shown in the paper the effect in transistor mismatch is accounted for by the inclusion of correcting factors in the weights of the SFG branches, but the topology of the graph remains constant, which makes the adaptation of the program developed for ideal structures quite straightforward.","PeriodicalId":221297,"journal":{"name":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","volume":"327 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MMICA.1999.833590","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a program for automatically generating symbolic signal flow graphs (SFGs) of switched current (SI) filtering structures considering the nonideal effect introduced by mismatching of transistors. Once the description of an SI filtering topology is given, by using a new version of symbSI the corresponding SFG is generated including transistor mismatch. As will be shown in the paper the effect in transistor mismatch is accounted for by the inclusion of correcting factors in the weights of the SFG branches, but the topology of the graph remains constant, which makes the adaptation of the program developed for ideal structures quite straightforward.