Bonkee Kim, Tae Wook Kim, Youngho Cho, M. Jeong, Seyeob Kim, Heeyong Yoo, Seong-Mo Moon, Tae-Ju Lee, Jin-Kyu Lim, Boeun Kim
{"title":"A 100mW Dual-Band CMOS Mobile-TV Tuner IC for T-DMB/DAB and ISDB-T","authors":"Bonkee Kim, Tae Wook Kim, Youngho Cho, M. Jeong, Seyeob Kim, Heeyong Yoo, Seong-Mo Moon, Tae-Ju Lee, Jin-Kyu Lim, Boeun Kim","doi":"10.1109/ISSCC.2006.1696318","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696318","url":null,"abstract":"A 0.18mum CMOS dual-band low-IF mobile-TV tuner IC for T-DMB/DAB that supports Band-III and L-band is presented. By modifying a few metals and via masks, the IC can support VHF and UHF bands for ISDB-T partial reception. The chip meets all the specifications of both applications with a sensitivity of <-98dBm while consuming 100 mW from a 1.8V supply and occupying 3.4times3.3mm2","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129466575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 16-to-18GHz 0.18-m Epi-CMOS Divide-by-3 Injection-Locked Frequency Divider","authors":"Hui Wu, Lin Zhang","doi":"10.1109/ISSCC.2006.1696312","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696312","url":null,"abstract":"A new injection-locked frequency divider (ILFD) topology is proposed for divide-by-odd-number operation. An 18 GHz divide-by-3 prototype is implemented using 0.18mum standard digital CMOS with low-resistivity substrate. It achieves 1 GHz locking range with 3.4dBm injection power, which increases to 3.2GHz with built-in tuning. The phase noise is close to theoretical value of 9.5dB down from input","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131310609","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Blocker-Vigilant Channel-Select Filter with Adaptive IIP3 and Power Dissipation","authors":"A. Yoshizawa, Y. Tsividis","doi":"10.1109/ISSCC.2006.1696242","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696242","url":null,"abstract":"A dynamic biasing scheme that reduces the average dc power of channel-select filters is presented. An adaptive IIP3, 5th-order Butterworth low-pass filter is implemented in a 0.18mum CMOS process with a 1.8V supply voltage. The filter quiescent current is 1.2mA, with a -5dBV out-of-channel IIP3. With a blocker level of -13dBV, the supply current increases to 2.7mA and the IIP3 increases to +20dBV","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126850803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Böhm, A. Ullmann, D. Zipperer, A. Knobloch, W. Glauert, W. Fix
{"title":"Printable electronics for polymer RFID applications","authors":"M. Böhm, A. Ullmann, D. Zipperer, A. Knobloch, W. Glauert, W. Fix","doi":"10.1109/ISSCC.2006.1696146","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696146","url":null,"abstract":"An organic RF identification transponder operating at a carrier frequency of 13.56MHz is presented in a proof of concept IC with no ID. The rectifier and the digital integrated modulation circuit are based on organic p-type semiconducting material with a total transponder area of 4cm2. The operational distance is 0 to 4.75cm while the clock frequency is 120Hz","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123368369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A phase-noise reduction technique for quadrature LC-VCO with phase-to-amplitude noise conversion","authors":"Chih-Wei Yao, A. Willson","doi":"10.1109/ISSCC.2006.1696109","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696109","url":null,"abstract":"A phase-noise reduction technique for quadrature VCOs reduces and shapes the transistor thermal noise injected into the system, and also provides a phase-to-amplitude noise conversion mechanism to further reduce phase noise. Two experimental designs provide 17% and 1% tuning ranges centered at 5.1GHz and 5.3GHz with phase noise of -132.6dBc/Hz and -134.4dBc/Hz at a 1MHz offset, respectively","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113931889","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Bathaee, H. Ghezelayagh, Wang Qin Heng, D. Nicolae, O. Fratu, Radu Pop, G. Dilimot, Vali Feies, Petronela Agache, R. Ruscu, Mihu Iorgulescu, Jing Gang, W. Lin, Ma Lei, D. Hui, Wang Tao
{"title":"A 0.13/spl mu/m CMOS SoC for all format blue and red laser DVD front-end digital signal processor","authors":"M. Bathaee, H. Ghezelayagh, Wang Qin Heng, D. Nicolae, O. Fratu, Radu Pop, G. Dilimot, Vali Feies, Petronela Agache, R. Ruscu, Mihu Iorgulescu, Jing Gang, W. Lin, Ma Lei, D. Hui, Wang Tao","doi":"10.1109/ISSCC.2006.1696143","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696143","url":null,"abstract":"This paper presents an all-format DVD SoC front-end DSP capable of 550Mb/s for HD-DVD, Blu-ray disc and DVD/CD red laser rewritable standards. This chip includes an analog front-end; PRML read channel, disc controller, servo system and dual processor. The analog blocks contain 640k transistors, and the digital blocks consist of 2.3M gates with a die area of 62mm2","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125003808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 10Gb/s burst-mode/continuous-mode laser driver with current-mode extinction-ratio compensation circuit","authors":"Day-Uei Li, Chia-Ming Tsai","doi":"10.1109/ISSCC.2006.1696132","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696132","url":null,"abstract":"A burst/continuous-mode laser driver for 10Gb/s Ethernet PONs is implemented in a 0.18mum CMOS process. With a dual-loop current-mode control circuit, the driver automatically compensates the extinction ratio of the laser output. Under burst-mode operation, the laser turn on/off time is <3ns","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121586260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Bogner, F. Kuttner, C. Kropf, T. Hartig, Markus Burian, Hermann Eul
{"title":"A 14b 100MS/s digitally self-calibrated pipelined ADC in 0.13/spl mu/m CMOS","authors":"P. Bogner, F. Kuttner, C. Kropf, T. Hartig, Markus Burian, Hermann Eul","doi":"10.1109/ISSCC.2006.1696123","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696123","url":null,"abstract":"A 14b multi-bit-per-stage pipelined ADC is implemented in a 0.13mum digital CMOS process. The gain and matching errors of the analog circuitry are compensated by a digital calibration scheme that allows the usage of a low-gain op-amp. A low power consumption has been reached by introducing a charge compensation scheme","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125620829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Che-Fu Liang, Shen-Iuan Liu, Yen-Horng Chen, Tzu-Yi Yang, G. Ma
{"title":"A 14-band Frequency Synthesizer for MB-OFDM UWB Application","authors":"Che-Fu Liang, Shen-Iuan Liu, Yen-Horng Chen, Tzu-Yi Yang, G. Ma","doi":"10.1109/ISSCC.2006.1696074","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696074","url":null,"abstract":"A 14-band frequency synthesizer for UWB application is realized in a 0.18 mum CMOS process. It uses two PLLs and three mixers. The unwanted spurs due to frequency mixing are at least 35dB lower than the output carriers by using a quadrature divide-by-3 circuit and a 2-stage single-sideband mixer. The core circuit area is 1.5 mm2 and the power consumption is 160mW","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122632066","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A low-power true random number generator using random telegraph noise of single oxide-traps","authors":"R. Brederlow, R. Prakash, C. Paulus, R. Thewes","doi":"10.1109/ISSCC.2006.1696222","DOIUrl":"https://doi.org/10.1109/ISSCC.2006.1696222","url":null,"abstract":"A true random number generator is realized by utilizing the noise produced by single oxide traps in small-area MOSFETs in combination with built-in redundancy. The circuit has an area of 0.009mm2 in 0.12mum CMOS and consumes 50muW at 200kb/s random output data. The concept is robust against environmental noise and supply-voltage variations and is thus suitable for operation within security controllers","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131761344","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}