{"title":"一种16- 18ghz 0.18 m Epi-CMOS分频器","authors":"Hui Wu, Lin Zhang","doi":"10.1109/ISSCC.2006.1696312","DOIUrl":null,"url":null,"abstract":"A new injection-locked frequency divider (ILFD) topology is proposed for divide-by-odd-number operation. An 18 GHz divide-by-3 prototype is implemented using 0.18mum standard digital CMOS with low-resistivity substrate. It achieves 1 GHz locking range with 3.4dBm injection power, which increases to 3.2GHz with built-in tuning. The phase noise is close to theoretical value of 9.5dB down from input","PeriodicalId":166617,"journal":{"name":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"119","resultStr":"{\"title\":\"A 16-to-18GHz 0.18-m Epi-CMOS Divide-by-3 Injection-Locked Frequency Divider\",\"authors\":\"Hui Wu, Lin Zhang\",\"doi\":\"10.1109/ISSCC.2006.1696312\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new injection-locked frequency divider (ILFD) topology is proposed for divide-by-odd-number operation. An 18 GHz divide-by-3 prototype is implemented using 0.18mum standard digital CMOS with low-resistivity substrate. It achieves 1 GHz locking range with 3.4dBm injection power, which increases to 3.2GHz with built-in tuning. The phase noise is close to theoretical value of 9.5dB down from input\",\"PeriodicalId\":166617,\"journal\":{\"name\":\"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"119\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2006.1696312\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2006.1696312","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 16-to-18GHz 0.18-m Epi-CMOS Divide-by-3 Injection-Locked Frequency Divider
A new injection-locked frequency divider (ILFD) topology is proposed for divide-by-odd-number operation. An 18 GHz divide-by-3 prototype is implemented using 0.18mum standard digital CMOS with low-resistivity substrate. It achieves 1 GHz locking range with 3.4dBm injection power, which increases to 3.2GHz with built-in tuning. The phase noise is close to theoretical value of 9.5dB down from input